Publications by Ehsan Mohammadpour

A Network Calculus Analysis of Asynchronous Mechanisms in Time-Sensitive Networks

Time-sensitive networks provide worst-case guarantees for applications in domains such as the automobile, automation, avionics, and the space industries. A violation of these guarantees can cause considerable financial loss and serious damage to human lives. To avoid this, it is crucial to provide a deterministic analysis of time-sensitive networks. Our analysis is based on network calculus, a framework for computing bounds on delay and backlog by using bit-level arrival-curve and service-curve characterizations. In this thesis, we focus on the analysis of time-sensitive networks to address four key requirements, specifically, bounded worst-case delay and delay jitter (defined as the difference between worst-case and best-case delays), zero congestion loss, and in-order packet delivery. In time-sensitive networks, source flows are constrained by the number of packets. A common approach for obtaining a delay bound is to derive a bit-level arrival curve from a packet-level arrival curve, and then to use network calculus. However, such a method is not tight: we show that better bounds can be obtained by directly exploiting the arrival curves expressed at the packet level. By exploiting the information on the packet transmission rate, our analysis method also leads to better bounds when flows are constrained with bit-level arrival curves.Second, we focus on the computation of delay and backlog bounds for an asynchronous configuration of IEEE Time-Sensitive Networking with a Credit-Based Shaper (CBS) and Asynchronous Traffic Shaping (ATS). ATS is an implementation of the interleaved regulator that regulates traffic in the network before admitting it into a CBS buffer, thus avoiding burstiness cascades. Due to the interleaved regulator, traffic is regulated at every switch, which allows for the computation of explicit delay and backlog bounds. Furthermore, we obtain a per-flow bound for the response time of CBSs by deriving novel results on service curves and credit bounds for CBSs. We also compute a per-flow bound on the response time of the interleaved regulator. Using the above results, we compute bounds on the per-class backlogs. Then, we use the newly computed delay bounds, along with recent results on interleaved regulators from the literature, to derive tight end-to-end delay bounds; then, we show that these derived bounds are less than the sums of per-switch delay bounds. Third, we analyze the effects of re-sequencing buffers, used to provide in-order packet delivery in time-sensitive networks. To provide worst-case guarantees, up until recently, there has not been a precise understanding of per-flow reordering metrics or of the dimensioning of re-sequencing buffers. We show that a previously proposed per-flow metric, called reordering late time offset (RTO), determines the timeout value. If the network is lossless, another previously defined metric, called reordering byte offset (RBO), determines the required buffer. If packet losses cannot be ignored, the required buffer can be larger than RBO, and depends on the jitter, on the arrival curve of the flow at its source, and on the timeout. Then, we develop a calculus for computing the RTO for a flow path. Our method uses a novel relation with the jitter and the arrival curve, together with a decomposition of the path into non-order-preserving and order-preserving elements...

EPFL2023

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In time-sensitive networks, bounds on worst-case delays are typically obtained by using network calculus and assuming that flows are constrained by bit-level arrival curves. However, in IEEE TSN or IETF DetNet, source flows are constrained on the number of packets rather than bits. A common approach to obtain a delay bound is to derive a bit-level arrival curve from a packet-level arrival curve. However, such a method is not tight: we show that better bounds can be obtained by directly exploiting the arrival curves expressed at the packet level. Our analysis method also obtains better bounds when flows are constrained with g-regulation, such as the recently proposed Length-Rate Quotient rule. It can also be used to generalize some recently proposed network-calculus delay-bounds for a service curve element with known transmission rate.

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

Analysis of Dampers in Time-Sensitive Networks With Non-Ideal Clocks

Jean-Yves Le Boudec, Ehsan Mohammadpour

Dampers are devices that reduce delay jitter in the context of time-sensitive networks, by delaying packets for the amount written in packet headers. Jitter reduction is required by some real-time applications; beyond this, dampers have the potential to solve the burstiness cascade problem of deterministic networks in a scalable way, as they can be stateless. Dampers exist in several variants: some apply only to earliest-deadline-first schedulers, whereas others can be associated with any packet schedulers; some enforce FIFO ordering whereas some others do not. Existing analyses of dampers are specific to some implementations and some network configurations; also, they assume ideal, non-realistic clocks. In this paper, we provide a taxonomy of all existing dampers in general network settings and analyze their timing properties in presence of non-ideal clocks. In particular, we give formulas for computing residual jitter bounds of networks with dampers of any kind. We show that non-FIFO dampers may cause reordering due to clock non-idealities and that the combination of FIFO dampers with non-FIFO network elements may very negatively affect the performance bounds. Our results can be used to analyze timing properties and burstiness increase in any time-sensitive network, as we illustrate on an industrial case-study.

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Improved Credit Bounds for the Credit-Based Shaper in Time-Sensitive Networking

Jean-Yves Le Boudec, Ehsan Mohammadpour, Eleni Stai

In Time-Sensitive Networking (TSN), it is important to formally prove per-flow latency and backlog bounds. To this end, recent works have applied network calculus and obtained latency bounds from service curves. The latency component of such service curves is directly derived from upper bounds on the values of the credit counters used by the Credit-Based Shaper (CBS), an essential building-block of TSN. In this paper, we derive and formally prove credit upper bounds for the CBS, which improve on existing bounds.

2019

Improved Delay Bound for a Service Curve Element with Known Transmission Rate

Jean-Yves Le Boudec, Ehsan Mohammadpour, Eleni Stai

Network calculus is often used to prove delay bounds in deterministic networks, using arrival and service curves. We consider a FIFO system that offers a rate-latency service curve and where packet transmission occurs at line rate without pre-emption. The existing network calculus delay bounds take advantage of the service curve guarantee but not of the fact that transmission occurs at full line rate. In this letter, we provide a novel, improved delay bound which takes advantage of these two features. Contrary to existing bounds, ours is per-packet and depends on the packet length. We prove that it is tight.

2019

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We compute bounds on end-to-end worst-case latency and on nodal backlog size for a per-class deterministic network that implements Credit Based Shaper (CBS) and Asynchronous Traffic Shaping (ATS), as proposed by the Time-Sensitive Networking (TSN) standardization group. ATS is an implementation of the Interleaved Regulator, which reshapes traffic in the network before admitting it into a CBS buffer, thus avoiding burstiness cascades. Due to the interleaved regulator, traffic is reshaped at every switch, which allows for the computation of explicit delay and backlog bounds. Furthermore, we obtain a novel, tight per-flow bound for the response time of CBS, when the input is regulated, which is smaller than existing network calculus bounds. We also compute a per-flow bound on the response time of the interleaved regulator. Based on all the above results, we compute bounds on the per-class backlogs. Then, we use the newly computed delay bounds along with recent results on interleaved regulators from literature to derive tight end-to-end latency bounds and show that these are less than the sums of per-switch delay bounds.

IEEE2018