Ana Conde Rubio | EPFL Graph Search

I received my degree in Physics in 2012 by the University of Zaragoza after doing my last year in Southampton (UK), where I had my first contact with nanotechnology. I moved then to study the Master of Nanoscience and Nanotechnology at University of Barcelona. During my master’s project in the Group of Magnetic Nanomaterials entitled Sputtering and characterization of granular AuFe as Nanoimprint Lithography nanoparticle precursors I worked in sputtering deposition, transport measurements to analyze magnetoresistance, magnetization analysis with SQUID, absorbance measurements in the UV-visible range and microstructure analysis by TEM, SEM, MFM and QNM. After finishing my master, I had the opportunity to continue in the group to pursue my PhD under the supervision of Prof. X. Batlle and Prof. A. Labarta. During this stage, my research activities were mainly focused on the simulation, design, fabrication and characterization of plasmonic nanostructures. In particular, I worked intensively with thermal nanoimprint and electron beam lithography in the Clean Room at IMB-CNM, where I performed all the nanofabrication part in collaboration with Prof. Francesc Pérez-Murano’s group, and FDTD Solutions from Lumerical© for the simulation part. Thanks to my FPI contract, I had the opportunity to do a 3-month stay at Prof. Giessen’s group in University of Stuttgart. In the last months of my thesis, I had the pleasure of collaborating with Dr. Agustín Mihi (ICMAB) for the optical characterization. Currently I am a Postdoctoral Scientist at Prof. Jürgen Brugger’s group (Microsystems Laboratory 1) at École Polytechnique Fédérale de Lausanne (EPFL) working in Thermal Scanning Probe Lithography (t-SPL) for the fabrication of 2D material-based devices. I also contribute with studies in self-assembly where we use capillary assisted particle assembly to create nanogaps and arrays of plasmonic nanoparticles with sensing purposes.

Edge-Contact MoS2 Transistors Fabricated Using Thermal Scanning Probe Lithography

Giovanni Boero, Jürgen Brugger, Ana Conde Rubio, Xia Liu

The science and engineering of two-dimensional materials (2DMs), in particular, of 2D semiconductors, is advancing at a thriving pace. It is well known that these delicate few-atoms thick materials can be damaged during the processing toward their integration into final devices. Thermal scanning probe lithography (t-SPL) is a gentle alternative to the typically used electron beam lithography to fabricate these devices avoiding the use of electrons, which are well known to deteriorate the 2DMs' properties. Here, t-SPL is used for the fabrication of MoS2-based field effect transistors (FETs). In particular, the use of t-SPL is demonstrated for the first time for the fabrication of edge-contact MoS2 FETs, combining the hot-tip patterning and Ar+ milling to etch the 2DM. To avoid contamination of the contact interface by atmospheric gas molecules, etching and metal deposition are performed without breaking the vacuum conditions in between. With this process, edge contact MoS2 FETs are successfully fabricated and characterized. On/off ratios up to 10(8) and 10(9) are obtained at room temperature in air and vacuum, respectively, i.e., comparable with the best values reported in the literature.

AMER CHEMICAL SOC2022

Edge-contact MoS2 transistors made by thermal scanning probe lithography

Giovanni Boero, Jürgen Brugger, Ana Conde Rubio, Xia Liu

Two-dimensional materials (2DM) have emerged as potential candidates for low power electronics, optoelectronics, and sensing [1]. However, the chemical and physical processes involved in conventional lithography methods, have shown detrimental effects on 2DM devices [2,3]. Another bottleneck in the fabrication of 2DM devices is its contact resistance to metals. The characteristic Schottky barrier appearing at the junction between a 2DM and a 3D metallic contact remains a limiting factor in the performance of 2DM-based electronic devices. When 2DM are exposed to air, molecules adhere to the surface forming layers with a thickness that can be of the same order of the 2DM itself, affecting the 2DM-metal interface in top-contact devices. Besides, due to the inertness of the basal planes in 2DM, top contacts can only be achieved through Van der Waals forces. When multilayered systems are considered, this becomes an even bigger issue due to the large conductivity anisotropy of 2DM between in- and out-of-plane directions. On the other hand, edge-contacted devices enable shorter bonding distances and covalent bonding to every layer but at the expense of a more complex fabrication process [4]. Here, we propose a process based on thermal scanning probe lithography (t-SPL) to fabricate edge-contact 2DM transistors (see Fig. 1). It has already been demonstrated that t-SPL is a better candidate than electron beam lithography for the fabrication of top-contact 2DM-based transistors as the use of electrons is avoided and the heat from the tip remains sufficiently far from the 2DM to avoid the deterioration of the 2DM properties [3]. Here, we go one-step further and achieve edge-contact by combining t-SPL with ion-milling and physical vapor deposition (PVD) in the same chamber [5], achieving a clean edge contact. The proposed process is schematically shown in Fig. 1a and carried-out as follows. MoS2 flakes are mechanically exfoliated onto Si substrates covered by a 200 nm SiO2 layer. For the fabrication of the contacts, a bilayer of PPA (30 nm)-PMGI (90 nm) is used. Patterning is performed by a mix-and-match approach combining t-SPL for the small features and direct laser writing for large features, both implemented using the same commercial apparatus. After wet etch in TMAH solution, the samples are placed into the PVD chamber where Ar+ milling is used to etch the flakes and, subsequently, the deposition of Cr-Au or Ti-Au is performed by thermal evaporation without breaking the vacuum. After the final lift-off, clean edge-contacts are obtained. Devices with different 2DM thicknesses are fabricated. The electrical characterization shows that multilayered devices achieve better performances with respect to single layer devices, with on/off ratios of up to 108 and mobilities up to 70 cm2V-1s-1. These values are comparable with the highest reported values for MoS2 transistors without hBN encapsulation. Low-temperature measurements down to 80 K are performed and used to extract the Schottky barrier height finding values down to 68 meV. For the sake of comparison, top-contact devices are also fabricated following a similar process but without ion milling. Top-contact devices show poorer performance compared to edge-contact ones with mobilities below 5 cm2V-1s-1 and a highest on/off ratio of 106, most likely due to surface contamination. [1] S. Das et al., Annu. Rev. Mater. Res. 45 (2015) 1–27. [2] Z. Cheng et al., 2D Mater. 6 (2019) 034005. [3] X. Zheng et al., Nat. Electron. 2 (2019) 17–25. [4] Y. Matsuda et al., J. Phys. Chem. C. 114 (2010) 17845–17850. [5] Z. Cheng et al., Nano Lett. 19 (2019) 5077–5085.

2021

Edge-contact MoS2 transistors made by thermal scanning probe lithography

Giovanni Boero, Jürgen Brugger, Ana Conde Rubio, Xia Liu

2021