Publications by Vishal Gupta | EPFL Graph Search

Tolerate It if You Cannot Reduce It: Handling Latency in Tiered Memory

Current memory tiering systems mitigate asymmetric latency through page migration between tiers. While this approach effectively h ides l atency, i t overlooks scenarios where latency could potentially be tolerated. We propose that an efficient system shou ...

ACM2025

Ship your Critical Section, Not Your Data: Enabling Transparent Delegation with TCLocks

Sanidhya Kashyap, Vishal Gupta

Today's high-performance applications heavily rely on various synchronization mechanisms, such as locks. While locks ensure mutual exclusion of shared data, their design impacts application scalability. Locks, as used in practice, move the lock-guarded sha ...

USENIX ASSOC2023

Micro BTB: A High Performance and Storage Efficient Last-Level Branch Target Buffer for Servers

Vishal Gupta

High-performance branch target buffers (BTBs) and the L1I cache are key to high-performance front-end. Modern branch predictors are highly accurate, but with an increase in code footprint in modern-day server workloads, BTB and L1I misses are still frequen ...

ASSOC COMPUTING MACHINERY2022

ODINFS: Scaling PM Performance with Opportunistic Delegation

Sanidhya Kashyap, Yuchen Qian, Vishal Gupta

Existing file systems for persistent memory (PM) exploit its byte-addressable non-volatile access with low latency and high bandwidth. However, they do not utilize two unique PM properties effectively. The first one is contention awareness, i.e., a small n ...

Usenix Assoc2022