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STMBench7: A Benchmark for Software Transactional Memory

Related publications (76)

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Cache-Aware Lock-Free Concurrent Hash Tries

Martin Odersky, Aleksandar Prokopec

This report describes an implementation of a non-blocking concurrent shared-memory hash trie based on single-word compare-and-swap instructions. Insert, lookup and remove operations modifying different parts of the hash trie can be run independent of each ...

2011

Why STM can be more than a Research Toy

Rachid Guerraoui, Vincent Gramoli, Aleksandar Dragojevic, Pascal Felber

Software Transactional Memory (STM) promises to simplify concurrent programming without requiring specific hardware support. Yet, STM’s credibility lies on the extent to which it enables to leverage multicores and outperform sequential code. A recent CACM ...

2011

Formalizing and verifying transactional memories

Vasu Singh

Transactional memory (TM) has shown potential to simplify the task of writing concurrent programs. TM shifts the burden of managing concurrency from the programmer to the TM algorithm. The correctness of TM algorithms is generally proved manually. The goal ...

EPFL2010

The VELOX Transactional Memory Stack

Rachid Guerraoui, Vincent Gramoli, Michal Kapalka, Aleksandar Dragojevic, Pascal Felber

The adoption of multi- and many-core architectures for mainstream computing undoubtedly brings profound changes in the way software is developed. In particular, the use of fine grained locking as the multi-core programmer’s coordination methodology is cons ...

Institute of Electrical and Electronics Engineers2010

Theory of Transactional Memory

Michal Kapalka

Transactional memory (TM) is a promising paradigm for concurrent programming, in which threads of an application communicate, and synchronize their actions, via inmemory transactions. Each transaction can perform any number of operations on shared data, an ...

EPFL2010

Architecture of a Real-Time Platform Independant GPS L1 Software Receiver

Personal digital assistants or mobile phones applications are not anymore restricted to multimedia or wireless communications, but have been extended to handle Global Positioning System (GPS) functionalities. Consequently, the growing market of GPS capable ...

EPFL2010

Leveraging Parallel Nesting in Transactional Memory

Rachid Guerraoui, Michal Kapalka, Aleksandar Dragojevic

Exploiting the emerging reality of affordable multi-core architectures goes through providing programmers with simple abstractions that would enable them to easily turn their sequential programs into concurrent ones that expose as much parallelism as possi ...

ACM2010

Multiversion concurrency control for the generalized search tree

Boi Faltings, Ion Constantinescu, Samuel Spycher

Many read-intensive systems where fast access to data is more important than the rate at which data can change make use of multidimensional index structures, like the generalized search tree (GiST). Although in these systems the indexed data are rarely upd ...

2009

The Semantics of Progress in Lock-Based Transactional Memory

Rachid Guerraoui, Michal Kapalka

Transactional memory (TM) is a promising paradigm for concurrent programming. Whereas the number of TM implementations is growing, however, little research has been conducted to precisely define TM semantics, especially their progress guarantees. This pape ...

ACM2009

Why STM can be more than a Research Toy

Rachid Guerraoui, Vincent Gramoli, Aleksandar Dragojevic, Pascal Felber

Software Transactional Memory (STM) promises to simplify concurrent programming without requiring speciﬁc hardware support. Yet, STM’s credibility lies on the extent to which it can leverage multi-cores to outperform sequential code. A recent CACM paper [8 ...

2009