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Power-efficient data management for dynamic applications

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BuMP: Bulk Memory Access Prediction and Streaming

Babak Falsafi, Boris Robert Grot, Stavros Volos, Javier Picorel Obando

With the end of Dennard scaling, server power has emerged as the limiting factor in the quest for more capable datacenters. Without the benefit of supply voltage scaling, it is essential to lower the energy per operation to improve server efficiency. As th ...

2014

Transactions Chasing Scalability and Instruction Locality on Multicores

Pinar Tözün

For several decades, online transaction processing (OLTP) has been one of the main server applications that drives innovations in the data management ecosystem, and in turn the database and computer architecture communities. Recent hardware trends oblige s ...

EPFL2014

Model-Based Design for Wireless Body Sensor Network Nodes

David Atienza Alonso, Francisco Javier Rincon Vallejos, Nadia Khaled, Ivan Beretta

Wireless body sensor networks (WBSNs) are a rising technology that allows constant and unobtrusive monitoring of the vital signals of a patient. The configuration of a WBSN node proves to be critical in order to maximize its lifetime, while meeting the pre ...

IEEE Press2012

Data Races vs. Data Race Bugs: Telling the Difference with Portend

George Candea, Cristian Zamfir, Baris Can Cengiz Kasikci

Even though most data races are harmless, the harmful ones are at the heart of some of the worst concurrency bugs. Alas, spotting just the harmful data races in programs is like finding a needle in a haystack: 76%-90% of the true data races reported by sta ...

Acm Order Department, P O Box 64145, Baltimore, Md 21264 Usa2012

Island-Based Adaptable Embedded System Design

David Atienza Alonso, Ivan Beretta

Nowadays, hardware devices are meant to host the execution of many complex, multi-core applications, whose functional and non-functional requirements vary according to the specific working domain. In this work, we propose a design methodology that combines ...

Institute of Electrical and Electronics Engineers2011

Accurately Classifying Data Races with Portend

George Candea, Cristian Zamfir, Baris Can Cengiz Kasikci

Even though most data races are harmless, the harmful ones are at the heart of some of the worst concurrency bugs. Eliminating all data races from programs is impractical (e.g., system performance could suffer severely), yet spotting just the harmful ones ...

2011

A hardware-software codesign framework for cellular computing

Pierre-André Mudry

Until recently, the ever-increasing demand of computing power has been met on one hand by increasing the operating frequency of processors and on the other hand by designing architectures capable of exploiting parallelism at the instruction level through h ...

EPFL2009

DPOR-DS: Dynamic Partial Order Reduction in Distributed Systems

Dejan Kostic, Maysam Yabandeh

In this paper, we present DPOR-DS, an algorithm for dynamic partial order reduction in model checking of distributed systems. This work is inspired by the techniques introduced in the seminal work of DPOR which is designed for multi-threaded systems. Diffe ...

2009

Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches

Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phases within the same application, may require a different capacity-speed tradeo ...

2007

Semiconductor memory device and method of operating same

Serguei Okhonin

There are many inventions described and illustrated herein. In a first aspect, the present invention is directed to a memory device and technique of reading data from and writing data into memory cells of the memory device. In this regard, in one embodimen ...

2007