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Comparing the effectiveness of fine-grain memory caching against page migration/replication in reducing traffic in DSM clusters

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Modeling cost/performance of a parallel computer simulator

Babak Falsafi, David Wood

This article examines the cost/performance of simulating a hypothetical target parallel computer using a commercial host parallel computer. We address the question of whether parallel simulation is simply faster than sequential simulation, or if it is also ...

1997

Performances of multiprocessor multidisk architectures for continuous media storage

Roger Hersch

Multimedia interfaces increase the need for large image databases, capable of storing and reading streams of data with strict synchronicity and isochronicity requirements. In order to fulfill these requirements, the authors consider a parallel image server ...

SPIE-Int. Soc. Opt. Eng1996

Fine-grain access control for distributed shared memory

Babak Falsafi, James Richard Larus, David Wood

The paper discusses implementations of fine-grain memory access control, which selectively restricts reads and writes to cache-block-sized memory regions. Fine-grain access control forms the basis of efficient cache- coherent shared memory. The paper focus ...

1994

Mechanisms for Cooperative Shared Memory

Babak Falsafi, James Richard Larus, David Wood

We introduce a new organization for multi-bank caches: the skewed-associative cache. A two-way skewed-associative cache has the same hardware complexity as a two-way set-associative cache, yet simulations show that it typically exhibits the same hit ratio ...

1994

Software vs. Hardware Shared Memory Implementation: A Case Study

Willy Zwaenepoel, Sandhya Dwarkadas

We compare the performance of software-supported shared memory on a general-purpose network to hardware-supported shared memory on a dedicated interconnect. Up to eight processors, our results are based on the execution of a set of application programs on ...

1994

LCM: Memory System Support for Parallel Language Implementation

James Richard Larus

Higher-level parallel programming languages can be difficult to implement efficiently on parallel machines. This paper shows how a flexible, compiler-controlled memory system can help achieve good performance for language constructs that previously appeare ...

ACM1994

Compiling for Shared-Memory and Message-Passing Computers

James Richard Larus

ACM1993

Mechanisms for cooperative shared memory

Babak Falsafi, James Richard Larus, David Wood

This paper explores the complexity of implementing directory protocols by examining their mechanisms - primitive operations on directories, caches, and network interfaces. We compare the following protocols: Dir1B, Dir4B, Dir4

1993

Cooperative Shared Memory: Software and Hardware for Scalable Multiprocessors

James Richard Larus, David Wood

We believe the absence of massively-parallel, shared-memory machines follows from the lack of a shared-memory programming performance model that can inform programmers of the cost of operations (so they can avoid expensive ones) and can tell hardware desig ...

ACM1992

Cache Considerations for Programmers of Multiprocessors

James Richard Larus

Although caches in most computers are invisible to programmers, they significantly affect program performance. This is particularly true for cache-coherent, shared-memory multiprocessors. This article presents recent research into the performance of parall ...

ACM1990