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Non-hysteretic punchthrough impact ionization MOS (PIMOS) transistor: Application to abrupt inverter and NDR circuits

Related publications (54)

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Modeling Parasitic Vertical PNP in HVCMOS

Maher Kayal, Jean-Michel Sallese, Camillo Stefanucci, Pietro Buccella

High voltage CMOS active devices inherently have a parasitic vertical bipolar transistor. The parasitic PNP structure can be activated during high-power switching operation causing a potential shift of the substrate. In this work a spice-modeling approach ...

IEEE2015

A 2.4-GHz low power polar transmitter for wireless body area network applications

Christian Enz, Vladimir Kopta, Franz Xaver Pengg

A 2.4 GHz low power polar transmitter is proposed in this paper. A dynamic biasing circuit, controlled by a digital envelope signal, is used as a direct digital-to-RF envelope converter. It effectively linearizes the input-output characteristic of the over ...

Springer Verlag2014

Frequency jumps in single chip microwave LC oscillators

Giovanni Boero, Marco Grisi, Gabriele Gualco

We report on the experimental observation of oscillation frequency jumps in microwave LC oscillators fabricated using standard complementary metal-oxide-semiconductor technologies. The LC oscillators, operating at a frequency of about 20 GHz, consist of a ...

American Institute of Physics2014

FinFET integrated low-power circuits for enhanced sensing applications

Mihai Adrian Ionescu, Antonios Bazigos, Alexandru Rusu, Sara Rigante, Paolo Livi

This work presents different circuit architectures that combine sensing and signal readout functions. The basic building block is a Fin Field-Effect Transistor (Fin-FET) used as both sensor and metal gate transistor. Moreover, a hybrid partially gated FinF ...

Elsevier2013

Single-layer MoS₂

Branimir Radisavljevic

This thesis explores the electronic properties of one layered transition-metal dichalcogenide – single-layer MoS2, and demonstrates the first transistors and integrated circuits with characteristics that outperform graphene electronics in many aspects and ...

EPFL2013

Beyond Scaling

Luca De Michielis

Over the recent decades, the balance between increasing the complexity of computer chips and simultaneously reducing cost per bit has been accommodated by down-scaling. While extremely successful in the past, this approach now faces grave limitations leadi ...

EPFL2012

Low-cost, CMOS compatible, Ta2O5-based hemi-memristor for neuromorphic circuits

Giovanni De Micheli, Sandro Carrara

In the past, tantalum oxide devices have been used to create non-volatile digital memories, whilst neglecting the analogue memristive characteristics of such devices. In this Letter, it is shown that these devices can provide a low-cost, low-power solution ...

Institution of Engineering and Technology2012

Process Variation and Leakage Power

Bahman Kheradmand Boroujeni

Technology scaling improves the energy, performance, and area of the digital circuits. With further scaling into sub-45nm regime, we are moving toward very low supply (VDD) and threshold voltages (VT), smaller VDD/VT ratio, high leakage current, and large ...

EPFL2011

Field-Effect Transistors Based on ZnO Nanowires

Daniel Dominik Kälblein

Semiconductor nanowires are an emerging class of materials with great potential for applications in future electronic devices. The small footprint and the large charge-carrier mobilities of nanowires make them potentially useful for applications with high- ...

EPFL2011

In-IC Strategies for 3D Devices in Bulk Silicon

Matthieu Bopp

The increase of components density in advanced microelectronics is practically dictated by the device size and the achievable pitch between the devices. Scaling down dimensions of devices and progress in the circuit design allowed following Moore's law dur ...

EPFL2011