Thermal-Aware Compilation for System-on-Chip Processing Architectures
Related publications (39)
Graph Chatbot
Chat with Graph Search
Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.
DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.
The register file is one of the hottest devices in processor- based systems. Leakage reduction techniques and DTM mechanisms re- quire a thermal characterization of the hardware. This paper presents a thermal model to analyze the temperature evolution in t ...
Tomorrow's embedded devices need to run multimedia applications demanding high computational power with low energy consumption constraints. In this context, the register file is a key source of power consumption and its inappropriate design and management ...
Today's embedded systems integrate multiple IP cores for processing, communication, and sensing on a single die as systems-on-chip (SoCs). Aggressive transistor scaling, decreased voltage margins and increased processor power and temperature have made reli ...
Tomorrow’s embedded devices need to run high resolution multimedia as well as need to support multistandard wireless systems which require an enormous computational complexity with a very low energy consumption and very high performance constraints. In thi ...
In this paper we introduce a new hardware/software approach to reduce the energy of the shared register file in upcoming embedded architectures with several VLIW processors. This work includes a set of architectural extensions and special loop unrolling te ...
Aggressive transistor scaling, decreased voltage margins and increased processor power and temperature, have made reliability assessment a much more significant issue in design. Although reliability of devices and interconnect has been broadly studied, her ...
Energy efficiency in microarchitectures has become a necessity. Significant dynamic energy savings can be realized for adaptive storage structures such as caches, issue queues, and register files by disabling unnecessary storage resources. Prior studies ha ...
In order to quantify the cooling conditions undergone by an ingot during direct-chill (DC) casting, thermocouples were immersed in the liquid pool and consequently entrapped in the solid, thus monitoring the temperature of the metal during its descent. Ass ...
A device interface for communicating between a processor system and a separate device employs cacheable control registers, both to indicate the receipt of a message and to receive messages to be transmitted. The data structure of the cacheable control regi ...