Gate insulation and drain current saturation mechanism in InAlN/GaN metal-oxide-semiconductor high-electron-mobility transistors
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Silicon technology has advanced through the past four decades at exponential rate both in performance and productivity. Along with the miniaturization, the power demand grew also exponentially. New technologies are studied in order to develop switches that ...
We present a systematic study of the performance of silicon nanowires (SiNWs) with different widths when they are used as ion-sensitive field-effect transistors (ISFETs) in pH-sensing experiments. The SiNW widths ranged from 100 nm to 1 mu m. The SiNW-ISFE ...
Semiconductor nanowires are an emerging class of materials with great potential for applications in future electronic devices. The small footprint and the large charge-carrier mobilities of nanowires make them potentially useful for applications with high- ...
Technology scaling improves the energy, performance, and area of the digital circuits. With further scaling into sub-45nm regime, we are moving toward very low supply (VDD) and threshold voltages (VT), smaller VDD/VT ratio, high leakage current, and large ...
The down-scaling of conventional MOSFETs has led to an impending power crisis, in which static power consumption is becoming too high. In order to improve the energy-efficiency of electronic circuits, small swing switches are interesting candidates to repl ...
In this paper, we report the first systematic study on electron mobility extraction in equilateral triangular gate-all-around Si nanowire junctionless nMOSFETs with cross-section down to 5 nm. 1 x 10(19) cm(-3) n-type channel doping, 5-20 nm Si nanowire wi ...
A new circuit style is proposed to tune the delay, subthreshold leakage (ISUB), and gate leakage (IG) of high fan-in multiplexer circuits, such as the FPGA Look-Up Table (LUT) and Switch-Box (SB), without increasing the Gate Induced Drain Leakage (GIDL) cu ...
Performance improvement by device scaling has been the prevailing method in the semiconductor industry over the past four decades. However, current silicon transistor technology is approaching a fundamental limit where scaling does not improve device perfo ...
Over the recent decades, the balance between increasing the complexity of computer chips and simultaneously reducing cost per bit has been accommodated by down-scaling. While extremely successful in the past, this approach now faces grave limitations leadi ...
A novel approach for the fabrication of transistors and circuits based on individual single-crystalline ZnO nanowires synthesized by a low-temperature hydrothermal method is reported. The gate dielectric of these transistors is a self-assembled monolayer t ...