A statistical approach for the area efficient implementation of fast wide operand adders using early termination detection is described and analyzed. It is shown that high throughput can be achieved based on area- and routing-efficient ripple-carry adders with only marginal overhead. They share a low AT-product with Brent-Kung adders but provide designers with totally different area/delay tradeoffs. The circuit does not require full-custom design and fits well into both self-timed and synchronous designs.
Jérémy Lucien Maurice Schlachter
Jan Van Herle, Zacharie Wuillemin, Arata Nakajo, Fabio Greco, Xin Wang
Giovanni De Micheli, Paolo Ienne, Mathias Soeken, Grace Zgheib, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Xifan Tang, Ana Petkovska, Zhufei Chu