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Tunneling path impact on semi-classical numerical simulations of TFET devices

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Tunnel Field Effect Transistors

Arnab Biswas

The aim of this work has been the investigation of homo-junction Tunnel Field Effect Transistors starting from a compact modelling perspective to its possible applications. Firstly a TCAD based simulation study is done to explain the main device characteri ...

EPFL2015

Compact modeling of DG-Tunnel FET for Verilog-A implementation

Mihai Adrian Ionescu, Antonios Bazigos, Luca De Michielis, Arnab Biswas

In this work, a compact model based on an analytical closed form solution of the 1D Poisson's equation for a double-gate Tunnel FET is derived. Furthermore, the current levels are estimated by implementing an algorithm based on the Kane's band-to-band tunn ...

IEEE2015

Practical Applications of Tunnel Field Effect Transistors

Traditional metal-oxide-semiconductor field effect transistor scaling has advanced successfully over 50 years providing significant increases in transistor count per chip and operating frequency, thus enabled the built of ever more performant and complex s ...

EPFL2015

Conformal Mapping Based DC Current Model For Double Gate Tunnel FETs

Mihai Adrian Ionescu, Luca De Michielis, Cem Alper, Arnab Biswas

In this work, the conformal mapping technique is applied to obtain an analytical closed form solution of the 2D Poisson’s equation for a double-gate Tunnel FET. The generated band profiles are accurate in all regions of device operation. Furthermore, the c ...

IEEE2014

Contacts and Environmental Effects in Two-Dimensional MoS2 Field-Effect Transistors

Dominik Sebastian Lembke

Two-dimensional (2D) semiconductors such as single- and few-layer molybdenum disulphide(MoS2) are promising building blocks for prospect flexible, transparent and low power electronics. Due to an electronic bandgap of the order of ~1.8 eV and atomic-scale ...

EPFL2014

Ferroelectric tunnel fet switch and memory

Mihai Adrian Ionescu

A Ferroelectric tunnel FET switch as ultra-steep (abrupt) switch with subthreshold swing better than the MOSFET limit of 60 mV/decade at room temperature combining two key principles: ferroelectric gate stack and band-to-band tunneling in gated p-i-n junct ...

2013

Growth of graded doped Si/SiGe Heterostructure Tunnel FET

Arnab Biswas

Tunnel FETs are the most promising ultra low power devices due to their potential of steeper subthreshold slopes and capability of using very low drive voltages. Switching is based on quantum mechanical band to band tunneling and no longer on thermal emiss ...

2013

TCAD Simulation of SOI TFETs and Calibration of Non-local Band-to-Band Tunneling Model

Mihai Adrian Ionescu, Wladyslaw Grabinski, Arnab Biswas, Surya Shankar Dan

This paper reports a simulation based study of the non-local tunneling model using a commercially available technology computer-aided design (TCAD) device simulator. Single gate Tunnel FET devices with 400nm gate length based on SOI technology are measured ...

Elsevier2012

Beyond Scaling

Luca De Michielis

Over the recent decades, the balance between increasing the complexity of computer chips and simultaneously reducing cost per bit has been accommodated by down-scaling. While extremely successful in the past, this approach now faces grave limitations leadi ...

EPFL2012

The electron–hole bilayer tunnel FET

Mihai Adrian Ionescu, Luca De Michielis, Livio Lattanzio

We propose a novel tunnel field-effect transistor (TFET) concept called the electron–hole bilayer TFET (EHBTFET). This device exploits the carrier tunneling through a bias-induced electron–hole bilayer in order to achieve improved switching and higher driv ...

Elsevier2012