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A 5.9mW/Gb/s 7Gb/s/pin 8-Lane Single-Ended RX with Crosstalk Cancellation Scheme using a XCTLE and 56-tap XDFE in 32nm SOI CMOS

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A 5.9mW/Gb/s 7Gb/s/pin 8-Lane Single-Ended RX with Crosstalk Cancellation Scheme using a XCTLE and 56-tap XDFE in 32nm SOI CMOS

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Non-linear Recovery of Sparse Signal Representations with Applications to Temporal and Spatial Localization

Sub-Nyquist artifacts and sampling moiré effects, Part 2: Spectral-domain analysis

A 90GS/s 8b 667mW 64x Interleaved SAR ADC in 32nm Digital SOI CMOS

A 110mW 6 Bit 36GS/S Interleaved SAR ADC for 100 GBE Occupying 0.048mm2 in 32nm SOI CMOS

A 35mW 8 b 8.8 GS/s SAR ADC with Low-Power Capacitive Reference Buffers in 32nm Digital SOI CMOS

A 3.1mW 8b 1.2GS/s Single-Channel Asynchronous SAR ADC with Alternate Comparators for Enhanced Speed in 32nm Digital SOI CMOS

High-temperature compatible 3D-integration processes for a vacuum-sealed CNT-based NEMS

Super-resolution from unregistered aliased images with unknown scalings and shifts

A speckle-based CMOS sensor array for arbitrary surface movement detection

Methods and apparatus for estimating a sparse channel