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Semiconductor memory cell, array, architecture and device, and method of operating same

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Semiconductor memory cell, array, architecture and device, and method of operating same

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BuMP: Bulk Memory Access Prediction and Streaming

Investigation of Tunnel Field-Effect Transistors as a Capacitor-less Memory Cell

Multi-level wordline driver for robust SRAM design in nano-scale CMOS technology

Cmos compatible non-volatile latch and d-flip flop using resistive switching materials

Variability-Aware Design Space Exploration of Embedded Memories

Replica Technique for Adaptive Refresh Timing of Gain-Cell-Embedded DRAM

High Sum-Rate Three-Write and Nonbinary WOM Codes

Can 2D-Nanocrystals Extend the Lifetime of Floating-Gate Transistor Based Nonvolatile Memory?

Nonvolatile Memory Cells Based on MoS2/graphene heterostructures

A ReRAM-Based Non-Volatile Flip-Flop with Sub-VT Read and CMOS Voltage-Compatible Write