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Near-Memory Address Translation

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An Out-of-Order Load-Store Queue for Spatial Computing

Paolo Ienne, Lana Josipovic, Philip Brisk

The efficiency of spatial computing depends on the ability to achieve maximal parallelism. This necessitates memory interfaces that can correctly handle memory accesses that arrive in arbitrary order while still respecting data dependencies and ensuring ap ...

Assoc Computing Machinery2017

ESTIMA: Extrapolating ScalabiliTy of In-Memory Applications

Rachid Guerraoui, Aleksandar Dragojevic, Georgios Chatzopoulos

This article presents ESTIMA, an easy-to-use tool for extrapolating the scalability of in-memory applications. ESTIMA is designed to perform a simple yet important task: Given the performance of an application on a small machine with a handful of cores, ES ...

2017

Scaling Up Concurrent Analytical Workloads on Multi-Core Servers

Iraklis Psaroudakis

Today, an ever-increasing number of researchers, businesses, and data scientists collect and analyze massive amounts of data in database systems. The database system needs to process the resulting highly concurrent analytical workloads by exploiting modern ...

EPFL2016

Storage method and apparatus for random access memory using codeword storage

Harm Cronie

A memory circuit, such as an embedded DRAM array, stores information as groups of bits or data using information coding in storage and retrieval data, instead of each bit being stored separately. Write data words can be mapped to storage format words that ...

2016

Designing a Virtual Runtime for FPGA Accelerators in the Cloud

Paolo Ienne, Mikhail Asiatici, Nithin George

FPGAs can provide high performance and energy efficiency to many applications; therefore, they are attractive computing platforms in a cloud environment. However, FPGA application development requires extensive hardware design knowledge which significantly ...

Ieee2016

Multi-Library Coded Caching

Michael Christoph Gastpar, Saeid Sahraei

We study the problem of coded caching when the server has access to several libraries and each user makes independent requests from every library. The single-library scenario has been well studied and it has been proved that coded caching can significantly ...

2016

Axo: Tolerating Delay Faults in Real-Time Systems

Jean-Yves Le Boudec, Simon Bliudze, Wajeb Saab

We address delay faults: faults that cause a software component to take more time for completing an action than a given deadline. Such faults are particularly of interest in real- time mission-critical control applications that use general-purpose computin ...

2016

Imaging and manipulation of skyrmion lattice domains in Cu2OSeO3

Helmuth Berger

Nanoscale chiral skyrmions in noncentrosymmetric helimagnets are promising binary state variables in high-density, low-energy nonvolatile memory. Skyrmions are ubiquitous as an ordered, single-domain lattice phase, which makes it difficult to write informa ...

Amer Inst Physics2016

Memory Systems and Interconnects for Scale-Out Servers

Stavros Volos

The information revolution of the last decade has been fueled by the digitization of almost all human activities through a wide range of Internet services. The backbone of this information age are scale-out datacenters that need to collect, store, and proc ...

EPFL2015

Challenges of Memory Management on Modern NUMA Systems

Baptiste Joseph Eustache Lepers, Mohammad Dashti Rahmat Abadi

The latency of memory access times is hence non-uniform, because it depends on where the request originates and where it is destined to go. Such systems are referred to as nonuniform memory access (or NUMA). Current x86 NUMA systems are cache coherent (cal ...

Assoc Computing Machinery2015