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FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

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FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

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Circuit Level Modeling Methodology of Parasitic Substrate Current Injection from a High-Voltage H-bridge at High Temperature

Run-time Mapping of Applications on FPGA-based Reconfigurable Systems

A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication

Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems

Delay Optimum And Area Optimal Mapping Of k-LUT Based FPGA Circuits

Using 3D Integration Technology To Realize Multi-Context Fpgas

Using 3D integration technology to realize multi-context FPGAs

Self-replication of complex digital circuits in programmable logic devices

An Experimental Platform for an Indoor Location and Tracking System

A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication

A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication

Delay Optimum And Area Optimal Mapping Of k-LUT Based FPGA Circuits

Circuit Level Modeling Methodology of Parasitic Substrate Current Injection from a High-Voltage H-bridge at High Temperature

A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication

Run-time Mapping of Applications on FPGA-based Reconfigurable Systems

Using 3D Integration Technology To Realize Multi-Context Fpgas

Using 3D integration technology to realize multi-context FPGAs

Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems

An Experimental Platform for an Indoor Location and Tracking System

Self-replication of complex digital circuits in programmable logic devices