The effects of practice schedule on learning a complex judgment task
Graph Chatbot
Chat with Graph Search
Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.
DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.
In perceptual learning, performance often improves within a short time if only one stimulus variant is presented, such as a line bisection stimulus with one outer-line-distance. However, performance stagnates if two bisection stimuli with two outer-line-di ...
Association for Research in Vision and Ophthalmology2008
In this paper we present the design and evaluate the performance of an autonomic workflow execution engine. Although there exist many distributed workflow engines, in practice, it remains a difficult problem to deploy such systems in an optimal configurati ...
Performance usually improves when observers train with one type of a visual stimulus. Roving denotes the situation when, instead of one, two or more types of stimuli are presented randomly interleaved (one per trial). For some stimulus types, performance i ...
Association for Research in Vision and Ophthalmology2008
Due to the steady tendency to propose highly customized products and to respond to volatile (i.e random) demands, Flexible Manufacturing Systems (FMS) are now present in most shopfloors. In this thesis, flexibility in a FMS is understood as the ability of ...
In perceptual learning, performance improves when stimuli are presented over and over again. In a bisection task, for example, two vertical outer lines delineate an interval which is bisected by a centre line. Observers indicate whether this centre line is ...
With technology scaling, the wire delay as a fraction of the total delay is increasing, and the communication architecture is becoming a major bottleneck for system performance in systems on chip (SoCs). A communication-centric design paradigm, networks on ...
