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Tunnel fet based non-volatile memory boosted by vertical band-to-band tunneling

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One Transistor Active Pixel Sensor with Tunnel FET

Mihai Adrian Ionescu, Nilay Dagtekin

A tunneling field effect transistor for light detection, including a p-type region connected to a source terminal, a n-type region connected to a drain terminal, an intrinsic region located between the p-type region and the n-type region to form a P-I junc ...

2016

III-V Nanowire Hetero-junction Tunnel FETs integrated on Si

Davide Cutaia

In the last decade the power consumption of electronic devices has increased for both static and active components. Following the Dennard's scaling rule, as long as the transistor sizes are reduced then the supply voltage (VDD) can also be scaled in order ...

EPFL2016

Wafer-Level Hysteresis-Free Resonant Carbon Nanotube Transistors

Mihai Adrian Ionescu, Ji Cao, Sebastian Thimotee Bartsch

We report wafer-level fabrication of resonant-body, carbon nanotube (CNT)field-effect transistors (FETs) in a dual-gate configuration. An integration density of >10(6) CNTFETs/cm(2), an assembly yield of >80%, and nanoprecision have been simultaneously obt ...

Amer Chemical Soc2015

Conformal Mapping Based DC Current Model For Double Gate Tunnel FETs

Mihai Adrian Ionescu, Luca De Michielis, Cem Alper, Arnab Biswas

In this work, the conformal mapping technique is applied to obtain an analytical closed form solution of the 2D Poisson’s equation for a double-gate Tunnel FET. The generated band profiles are accurate in all regions of device operation. Furthermore, the c ...

IEEE2014

Ambipolar silicon nanowire field effect transistor

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Michele De Marchi

This invention describes a novel electronic device consisting of one-or more-vertically stacked gate-all-around silicon nanowire field effect transistor (SNWFET) with two independent gate electrodes. One of the two gate electrodes, acting on the central se ...

2013

Ferroelectric tunnel fet switch and memory

Mihai Adrian Ionescu

A Ferroelectric tunnel FET switch as ultra-steep (abrupt) switch with subthreshold swing better than the MOSFET limit of 60 mV/decade at room temperature combining two key principles: ferroelectric gate stack and band-to-band tunneling in gated p-i-n junct ...

2013

FinFET integrated low-power circuits for enhanced sensing applications

Mihai Adrian Ionescu, Antonios Bazigos, Alexandru Rusu, Sara Rigante, Paolo Livi

This work presents different circuit architectures that combine sensing and signal readout functions. The basic building block is a Fin Field-Effect Transistor (Fin-FET) used as both sensor and metal gate transistor. Moreover, a hybrid partially gated FinF ...

Elsevier2013

From All-Si Nanowire TFETs Towards III-V TFETs

Hesham Ghoneim

Performance improvement by device scaling has been the prevailing method in the semiconductor industry over the past four decades. However, current silicon transistor technology is approaching a fundamental limit where scaling does not improve device perfo ...

EPFL2012

Over the recent decades, the balance between increasing the complexity of computer chips and simultaneously reducing cost per bit has been accommodated by down-scaling. While extremely successful in the past, this approach now faces grave limitations leadi ...

EPFL2012

Multi-gate Si nanowire MOSFETs

Mohammad Najmzadeh

Multi-gate devices e.g. gate-all-around (GAA) Si nanowires and FinFETs are promising can- didates for aggressive CMOS downscaling. Optimum subthreshold slope, immunity against short channel effect and optimized power consumption are the major benefits of s ...

EPFL2012