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Analytical Modeling of Double-Gate and Nanowire Junctionless ISFETs

Related publications (36)

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FinFET integrated low-power circuits for enhanced sensing applications

Mihai Adrian Ionescu, Antonios Bazigos, Alexandru Rusu, Sara Rigante, Paolo Livi

This work presents different circuit architectures that combine sensing and signal readout functions. The basic building block is a Fin Field-Effect Transistor (Fin-FET) used as both sensor and metal gate transistor. Moreover, a hybrid partially gated FinF ...

Elsevier2013

Functionalized 3D 7x20-array of vertically stacked SiNW FET for streptavidin sensing

Mihai Adrian Ionescu, Montserrat Fernandez-Bolanos Badia, Elizabeth Buitrago Godinez

A 3D, vertically stacked silicon nanowire (SiNW) field effect transistor (FET) featuring a high density array (7×20) of fully depleted channels has been successfully fabricated by a CMOS compatible process on silicon on insulator (SOI) and functionalized f ...

IEEE2013

Single-layer MoS₂

Branimir Radisavljevic

This thesis explores the electronic properties of one layered transition-metal dichalcogenide – single-layer MoS2, and demonstrates the first transistors and integrated circuits with characteristics that outperform graphene electronics in many aspects and ...

EPFL2013

Comparison between front- and back-gating of Silicon Nanoribbons in real-time sensing experiments

Carlotta Guiducci, Enrico Accastelli, Giulia Cappi, Thomas Ernst

Field-effect transistors (FETs) with open gate structures such as Silicon Nanoribbons (SiNRs) are promising candidates to become general platforms for ultrasensitive, label-free and real-time detection of biochemical interactions on surface. This work prop ...

2013

Beyond Scaling

Luca De Michielis

Over the recent decades, the balance between increasing the complexity of computer chips and simultaneously reducing cost per bit has been accommodated by down-scaling. While extremely successful in the past, this approach now faces grave limitations leadi ...

EPFL2012

Multi-gate Si nanowire MOSFETs

Mohammad Najmzadeh

Multi-gate devices e.g. gate-all-around (GAA) Si nanowires and FinFETs are promising can- didates for aggressive CMOS downscaling. Optimum subthreshold slope, immunity against short channel effect and optimized power consumption are the major benefits of s ...

EPFL2012

From All-Si Nanowire TFETs Towards III-V TFETs

Hesham Ghoneim

Performance improvement by device scaling has been the prevailing method in the semiconductor industry over the past four decades. However, current silicon transistor technology is approaching a fundamental limit where scaling does not improve device perfo ...

EPFL2012

In-IC Strategies for 3D Devices in Bulk Silicon

Matthieu Bopp

The increase of components density in advanced microelectronics is practically dictated by the device size and the achievable pitch between the devices. Scaling down dimensions of devices and progress in the circuit design allowed following Moore's law dur ...

EPFL2011

Self-Assembled Liquid-Gated Zinc Oxide Nanowire Transistors

Vivek Pachauri

This thesis aims at the site-specific realization of self-assembled field-effect transistors (FETs) based on semiconducting Zinc oxide NWs and their application towards chemical and bio-sensing in liquid medium. At first, a solution based growth method for ...

EPFL2011

Nanoengineered Silicon: Technology and Applications

Sandro Carrara, Lucia Baldi Unser

Silicon has been, and continues to be, the material support of integrated circuit (IC) technology-the enabling tool of one of the most impressive technological, industrial and social revolution of mankind. Silicon (both in monocrystalline and polycrystalli ...

2011