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Modular Design and Optimization of Biomedical Applications for Ultra-Low Power Heterogeneous Platforms

Related publications (36)

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A Unified Online Directed Acyclic Graph Flow Manager for Multicore Schedulers

David Atienza Alonso, Karim Kanoun

Numerous Directed-Acyclic Graph (DAG) schedulers have been developed to improve the energy efficiency of various multi-core systems. However, the DAG monitoring modules proposed by these schedulers make a priori assumptions about the workload and relations ...

IEEE2014

Energy-Aware Processing Platform Exploration for Embedded Biosignal Analysis

Ahmed Yasir Dogan

According to the World Health Organization, lifestyle-related diseases, e.g., cardiovascular diseases are the major cause of mortality worldwide. An accurate and continuous medical supervision is highly required for diagnosis and treatment of such diseases ...

EPFL2013

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Modern hardware is abundantly parallel and increasingly heterogeneous. The numerous processing cores have non-uniform access latencies to the main memory and to the processor caches, which causes variability in the communication costs. Unfortunately, datab ...

2012

Metadata Front-end for Shore-MT Storage Manager

Bao Duy Tran

Shore-MT is a scalable storage manager offering high performance on multi-core architectures. This report documents the design and implementation of Shore-MT front-end, a dynamic relational application layer for Shore-MT with metadata management capability ...

2012

Automated Real-Time Atrial Fibrillation Detection on a Wearable Wireless Sensor Platform

David Atienza Alonso, Francisco Javier Rincon Vallejos, Nadia Khaled

This paper presents an automated real-time atrial fibrillation (AF) detection approach that relies on the observation of two characteristic irregularities of AF episodes in the electrocardiogram (ECG) signal. The results generated after the analysis of the ...

IEEE Press2012

Methodology for the Hardware/Software Co-Design of Dataflow Programs

Marco Mattavelli, Ghislain Roquier, Richard Thavot

New generations of multi-core processors and reconfigurable hardware platforms are expected to provide a dramatic increase of processing capabilities. However, one obstacle for exploiting all the promises of such new platforms is the legacy of current appl ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2011

Methodology For The Hardware/Software Co-Design Of Dataflow Programs

Marco Mattavelli, Ghislain Roquier, Richard Thavot

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2011

A Mapping Flow for Dynamically Reconfigurable Multi-Core System-on-Chip Design

David Atienza Alonso, Ivan Beretta

Nowadays, multi-core Systems-on-Chip (SoCs) are typically required to execute multiple complex applications, which demand a large set of heterogeneous hardware cores with different sizes. In this context, the popularity of dynamically reconfigurable platfo ...

Institute of Electrical and Electronics Engineers2011

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The multicore revolution and the ever-increasing complexity of computing systems is dramatically changing system design, analysis and programming of computing platforms. Future architectures will feature hundreds to thousands of simple processors and on-ch ...

IEEE/ACM Press2011

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Multi-Processor Systems-on-Chip (MPSoCs) are penetrating the electronics market as a powerful, yet commercially viable, solution to answer the strong and steadily growing demand for scalable and high performance systems, at limited design complexity. Howev ...

IEEE Press2011