Opportunities and challenges of 2D materials in back-end-of-line interconnect scaling
Related publications (32)
Graph Chatbot
Chat with Graph Search
Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.
DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.
The progress in the technology of microelectronic devices has led to a strong miniaturization and high performance for circuits and systems, enabling modern applications such as mobile computing and communications. Today, remaining "off-chip" components th ...
Radio frequency identification (RFID) is an exciting, rapidly growing, multi-disciplinary field with emerging technologies and applications. Today RFID is a generic term for technologies that use radio frequencies to automatically identify people or object ...
Modern communication devices demand challenging specifications in terms of miniaturization, performance, power consumption and cost. Every new generation of radio frequency integrated circuits (RF-ICs) offer better functionality at reduced size, power cons ...
In the last forty years the semiconductor industry focused on the downscaling process of the CMOS (Complementary Metal-Oxide-Semiconductor) technology, trying to follow as much as possible the empirical Moore's Law. In the last five years this trend has be ...
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequential order, the size of the vertical contacts is similar to traditional contac ...
For the past couple of decades the desire to add more complexity to a computer chip, while simultaneously reducing the cost per bit, has been accommodated by down-scaling. This approach has been extremely successful in the past, but like all good things it ...
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequential order, the size of the vertical contacts is similar to traditional contac ...
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2011
Three dimensional stacked integrated circuits (3D ICs) are extremely attractive for overcoming the barriers in interconnect scaling, offering an opportunity to continue the CMOS performance trends for the next decade. However, from a thermal perspective, v ...
Hybrid integration and especially the packaging of microelectromechanical systems (i.e. MEMS) cannot rely on standardised packaging solutions due to the diversity of microsystems. As an example, the packaging requirements of a pressure sensor are different ...
Institut de Microtechnique, Université de Neuchâtel2009
Interlayer cooling is the only heat removal concept which scales with the number of active tiers in a vertically integrated chip stack. In this work, we numerically and experimentally characterize the performance of a three tier chip stack with a footprint ...