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Programming Heterogeneous CPU-GPU Systems by High-Level Dataflow Synthesis

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SQPR: Stream query planning with reuse

Daniel Kuhn, Wolfram Wiesemann

When users submit new queries to a distributed stream processing system (DSPS), a query planner must allocate physical resources, such as CPU cores, memory and network bandwidth, from a set of hosts to queries. Allocation decisions must provide the correct ...

IEEE2011

One Joule per GFlop for BLAS2 Now!

Vincent Keller

Energy consumption is today one of the major topics that the HPC community tries to tackle. In this paper, the authors present a thought experiment aiming at building a node of a supercomputer based on a GPU (Nvidia GTX280). The paper concentrate on BLAS2 ...

American Institute of Physics2010

ReSim, a Trace-Driven, Reconfigurable ILP Processor Simulator

Dionysios Pnevmatikatos, Sotiria Fytraki

Modern processors are becoming more complex and as features and application size increase, their evaluation is becoming more time-consuming. To date, design space exploration relies on extensive use of software simulation that when highly accurate is slow. ...

2009

An object-oriented model for adaptive high-performance computing on the computational GRID

Tuan Anh Nguyen

The dissertation presents a new parallel programming paradigm for developing high performance (HPC) applications on the Grid. We address the question "How to tailor HPC applications to the Grid?" where the heterogeneity and the large scale of resources are ...

EPFL2005

A Complete Network-On-Chip Emulation Framework

Giovanni De Micheli, David Atienza Alonso, Roman Hermida Correa, Nicolas Genko

Current systems-on-chip (SoC) execute applications that demand extensive parallel processing. Networks-on-chip (NoC) provide a structured way of realizing interconnections on silicon, and obviate the limitations of bus-based solutions. NoC can have regular ...

2005

Adding limited reconfigurability to superscalar processors

Marc Epalza

For the last thirty years, electronics, at first built with discrete components, and then as Integrated Circuits (IC), have brought diverse and lasting improvements to our quality of life. Examples might include digital calculators, automotive and airplane ...

EPFL2004

Graphical Monitoring of CPU Resource Consumption in a Java-based Framework

Andrea Camesi

Monitoring of CPU consumption is a very basic requirement in many areas of software. It is especially valuable in the frame of Internet applications, in support of specific aspects such as security, reliability and adaptability. This paper is set in the co ...

2004

Hiding Synchronization Delays in a GALS Processor Microarchitecture

Sandhya Dwarkadas

We analyze an Alpha 21264-like Globally–Asynchronous, Locally–Synchronous (GALS) processor organized as a Multiple Clock Domain (MCD) microarchitecture and identify the architectural features of the processor that influence the limited performance degradat ...

2004

Automated Instruction-Set Extension

Paolo Ienne, Kubilay Atasu

NOVELTY - The method involves traversing a tree of potential complex computer operations; and pruning the tree for optimality under constraints. The optimality comprises maximization of a function of merit. The constraints comprise a convexity constraint, ...

2003

Spyder

Christian Iseli

The Spyder project consists of the development of a reconfigurable processor as well as its application development environment. The name Spyder is an anagram of the first letters of "REconfigurable Processor Development SYstem", where the term reconfigura ...

EPFL1996