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Direct Model-checking of SysML Models

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We report our experience in enhancing automated grading in a functional programming course using formal verification. In our approach, we deploy a verifier for Scala programs to check equivalences between student submissions and reference solutions. Conseq ...

2024

Code Generation Approach Supporting Complex System Modeling based on Graph Pattern Matching

Jinzhi Lu, Yan Yan

Code generation is an effective way to drive the complex system development in model-based systems engineering. Currently, different code generators are developed for different modeling languages to deal with the development of systems with multi-domain. T ...

ELSEVIER2022

Bidirectional transformation between BIP and SysML for visualisation and editing

Leandro Kieliger, Clément Jean Maurice Nussbaumer

When it comes to designing software, the classic procedure consists of writing code that complies with the projects requirements first, and then to extensively test for bugs and defects. Although this approach is valid and can produce correct results, it i ...

2017

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Programmable Logic Controllers (PLCs) are embedded computers widely used in industrial control systems. Ensuring that a PLC software complies with its specification is a challenging task. Formal verification has become a recommended practice to ensure the ...

Institute of Electrical and Electronics Engineers2015

Orchestration Graphs

Pierre Dillenbourg

By modeling pedagogical scenarios as directed geometrical graphs and proposing an associated modeling language, this book describes how rich learning activities, often designed for small classes, can be scaled up for use with thousands of participants. Wit ...

EPFL Press2015

Uniform Analysis for Communicating Timed Systems (Extended Technical Report)

Hossein Hojjat

Languages based on the theory of timed automata are a well established approach for modelling and analysing real-time systems, with many applications both in an industrial and academic context. Model checking for timed automata has been studied extensively ...

2013

Efficient Model Checking of Fault-Tolerant Distributed Protocols

Johannes Kinder

To aid the formal verification of fault-tolerant distributed protocols, we propose an approach that significantly reduces the costs of their model checking. These protocols often specify atomic, process-local events that consume a set of messages, change t ...

IEEE2011

SystemC is an IEEE standard system-level language used in hardware/software co-design and has been widely adopted in the industry. This paper describes a formal approach to verifying SystemC designs by providing a mapping to the process algebra mCRL2. Our ...

2011

Model Checking a Networked System Without the Network

Rachid Guerraoui, Maysam Yabandeh

Current approaches to model checking distributed systems reduce the problem to that of model checking centralized systems: global states involving all nodes and communication links are systematically explored. The frequent changes in the network element of ...

2011

Model checking: Algorithmic verification and debugging

Joseph Sifakis

Turing Lecture from the winners of the 2007 ACM A.M. Turing Award.In 1981, Edmund M. Clarke and E. Allen Emerson, working in the USA, and Joseph Sifakis working independently in France, authored seminal papers that founded what has become the highly succes ...

2009