Assessment of the Bundle SNSPD Plus FPGA-Based TDC for High-Performance Time Measurements
Graph Chatbot
Chat with Graph Search
Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.
DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.
Network-on-Chip (NoC) has emerged as a very promising paradigm for designing scalable communication architecture for Systems on Chips (SoCs). However, NoCs designed to fulfill the bandwidth requirements between the cores of an SoC for a certain set of runn ...
Field programmable gate arrays (FPGA) are a recently developed family of programmable circuits. Like mask programmable gate arrays (MPGA), FPGAs implement thousands of logic gates. But, unlike MPGAs, a user can program an FPGA design as traditional program ...
In this paper, an experimental platform for indoor location and tracking using ultra wideband (UWB) impulse radio signals is presented and its performance measured. The platform has been developed entirely using standard electronic components that are comm ...
This paper presents a regular layout fabric made of via-programmable MCML universal logic cells for structured ASIC applications and the associated design flow. The proposed structured ASIC fabric offers high speed operation, very high noise immunity, as w ...
This paper presents a regular layout fabric made of via-programmable MCML universal logic cells for structured ASIC applications and the associated design flow. The proposed structured ASIC fabric offers very high noise immunity due to the differential ope ...