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Active wire fences for multitenant FPGAs

Related publications (32)

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Novel Configurable Logic Block Architecture Exploiting Controllable-Polarity Transistors, invited paper

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang

Controllable-polarity transistors exhibit a device-level configurability. Indeed, they can be dynamically configured between n- type and p-type. Such property can be exploited in Field Programmable Gate Arrays (FPGAs) to replace traditional Look- ...

IEEE2014

Coarse Grain Clock Gating Of Streaming Applications In Programmable Logic Implementations

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

Streaming applications describe a broad class of computing algorithms in areas such as signal processing, media coding and compression, cryptography, video analytics, network touting and packet processing and many others. For many of these applications, pr ...

Ieee2014

Coarse grain clock gating of streaming applications in programmable logic implementations

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

IEEE2014

A High-Performance Low-Power Near-Vt RRAM-based FPGA

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang

The routing architecture, heavily using programmable switches, dominates the area, delay and power of Field Programmable Gate Arrays (FPGAs). Resistive Random Access Memories (RRAMs) enable high-performance routing architectures through the r ...

2014

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The acquisition of Global Navigation Satellite Systems signals using Code Division Multiple Access can be performed through classical correlation or using a Fourier transform. These methods are well known but what is missing is a comparison of their perfor ...

Institute of Electrical and Electronics Engineers2013

Development process for clusters on a reconfigurable chip

Jaime Joven Murillo

Reconfigurable MPSoCs (Multiprocessor System-on-Chip) could be viable for certain applications niche where the flexibility of FPGAs (Field-Programmable Gate Array) and software is needed, and a small number of units dismiss other silicon options. However, ...

2012

Video-rate fluorescence lifetime imaging camera with CMOS single-photon avalanche diode arrays and high-speed imaging algorithm

Edoardo Charbon, David Li

A high-speed and hardware-only algorithm using a center of mass method has been proposed for singledetector fluorescence lifetime sensing applications. This algorithm is now implemented on a field programmable gate array to provide fast lifetime estimates ...

2011

Recent studies show that emotion is a mechanism for fast decision-making in human and other animals. Mathematical models have been developed for describing emotion in mammals. These models, similar to other bio-inspired models, must be implemented in embed ...

Springer Verlag2010

Improving FPGA Performance for Carry-Save Arithmetic

Paolo Ienne, Philip Brisk, Ajay Kumar Verma, Hadi Parandeh Afshar

The selective use of carry-save arithmetic, where appropriate, can accelerate a variety of arithmetic-dominated circuits. Carry-save arithmetic occurs naturally in a variety of DSP applications, and further opportunities to exploit it can be exposed throug ...

2010

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Recently, it was demonstrated that the polarity of carbon nanotube field effect transistors can be electrically controlled. In this paper we show how Programmable Logic Arrays (PLA) can be built out of these devices, and we illustrate how they outperform u ...

2008