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Rebooting Virtual Memory with Midgard

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BLOCK: Efficient Execution of Spatial Range Queries in Main-Memory

Anastasia Ailamaki, Thomas Heinis, Farhan Tauheed, Matthaios Alexandros Olma

The execution of spatial range queries is at the core of many applications, particularly in the simulation sciences but also in many other domains. Although main memory in desktop and supercomputers alike has grown considerably in recent years, most spatia ...

2017

An Out-of-Order Load-Store Queue for Spatial Computing

Paolo Ienne, Lana Josipovic, Philip Brisk

The efficiency of spatial computing depends on the ability to achieve maximal parallelism. This necessitates memory interfaces that can correctly handle memory accesses that arrive in arbitrary order while still respecting data dependencies and ensuring ap ...

Assoc Computing Machinery2017

Fat Caches For Scale-Out Servers

Babak Falsafi, Boris Robert Grot, Stavros Volos

The authors propose a high-capacity cache architecture that leverages emerging high-bandwidth memory modules. High-capacity caches capture the secondary data working sets of scale-out workloads while uncovering significant spatiotemporal locality across da ...

Institute of Electrical and Electronics Engineers2017

Tracking millions of humans

Alexandre Massoud Alahi, Vignesh Ramanathan

In this chapter, we present all the technical details that lead to successfully understanding the mobility of more than a hundred million individuals in crowded train terminals over the course of two years. We cover the full spectrum of an intelligent syst ...

Elsevier2017

ESTIMA: Extrapolating ScalabiliTy of In-Memory Applications

Rachid Guerraoui, Aleksandar Dragojevic, Georgios Chatzopoulos

This article presents ESTIMA, an easy-to-use tool for extrapolating the scalability of in-memory applications. ESTIMA is designed to perform a simple yet important task: Given the performance of an application on a small machine with a handful of cores, ES ...

2017

Networks on Chips: 15 Years Later

Giovanni De Micheli, Luca Benini

The authors of a Computer article from 2002 reflect on their proposal to use networks on chips to address scalable communications on silicon VLSI chips. ...

2017

Grand Challenges for Global Brain Sciences

Sean Lewis Hill, Miguel Nicolelis, Corrado Cali

The next grand challenges for society and science are in the brain sciences. A collection of 60+ scientists from around the world, together with 10+ observers from national, private, and foundations, spent two days together discussing the top challenges th ...

2016

Multi-Library Coded Caching

Michael Christoph Gastpar, Saeid Sahraei

We study the problem of coded caching when the server has access to several libraries and each user makes independent requests from every library. The single-library scenario has been well studied and it has been proved that coded caching can significantly ...

2016

Multi-Gigabyte On-Chip DRAM Caches for Servers

Dorde Jevdic

While DRAM latency has long been recognized as a major bottleneck in servers, DRAM bandwidth is emerging as an important bottleneck as server processors shift to many-core architectures to allow for sustainable throughput improvements. The rapid expansion ...

EPFL2015

Memory Systems and Interconnects for Scale-Out Servers

Stavros Volos

The information revolution of the last decade has been fueled by the digitization of almost all human activities through a wide range of Internet services. The backbone of this information age are scale-out datacenters that need to collect, store, and proc ...

EPFL2015