Publications related to Self-Calibrating Networks-On-Chip

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Improving the Power-Delay Performance in Subthreshold Source-Coupled Logic Circuits

Seyed Armin Tajalli, Yusuf Leblebici

Subthreshold source-coupled logic (STSCL) circuits can be used in design of low-voltage and ultra-low power digital systems. This article introduces and analyzes new techniques for implementing complex digital systems using STSCL gates with an improved pow ...

Springer-Verlag New York, Ms Ingrid Cunningham, 175 Fifth Ave, New York, Ny 10010 Usa2009

A Low-Noise CMOS Receiver Frontend for NMR-based Surgical Guidance

Giovanni Boero, Jens Anders

In this paper a novel architecture for an integrated NMR receiver front-end for surgical guidance applications is described. While the chip consumes only 9 mA supply current from a 3.3 V power supply it has a measured input referred noise density of 0.7 nV ...

Springer, 233 Spring Street, New York, Ny 10013, United States2009

A 4-Stream 802.11n Baseband Transceiver in 0.13 mu m CMOS

Andreas Peter Burg, Carl Christian Sten Dominic Senning

An IEEE 802.11n baseband transceiver ASIC is implemented in 0.13 mu m CMOS technology. The implementation has a core area of 14.4 mm(2) and is the first to support the optional 3- and 4-stream MIMO transmission modes of the standard for data rates up to 60 ...

Ieee Service Center Single Publication Sales Unit, 445 Hoes Lane, Piscataway, Nj 08854 Usa2009

A 4-Stream 802.11n Baseband Transceiver in 0.13 mu m CMOS

Andreas Peter Burg, Carl Christian Sten Dominic Senning

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009

A Low-Noise CMOS Receiver Frontend for MRI

Giovanni Boero, Jens Anders

In this paper a novel architecture for an integrated receiver front-end for micro magnetic resonance imaging (micro-MRI) applications is described. While the chip consumes only 9mA supply current (4mA in the LNA and 5mA in the output buffer) from a 33V pow ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2008

Fabrication of MEMS Resonators in Thin SOI

Mihai Adrian Ionescu, Daniel Grogg, Nicoleta-Diana Ciressan

A simple and fast process for micro-electromechanical (MEM) resonators with deep sub-micron transduction gaps in thin SOI is presented in this paper. Thin SOI wafers are important for advanced CMOS technology and thus are evaluated as resonator substrates ...

2008

Network-On-Chip Design and Synthesis Outlook

Giovanni De Micheli, David Atienza Alonso, Luca Benini, Srinivasan Murali, Federico Angiolini

With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor Systems-On-Chip (MPSoCs) consisting of complex integrated components communicating with each other at very high-speed rates. Intercommunication ...

2008

Configurable High-Throughput Decoder Architecture for Quasi-Cyclic LDPC Codes

Andreas Peter Burg, Nicholas Alexander Preyss, Christoph Studer

We describe a fully reconfigurable low-density parity check (LDPC) decoder for quasi-cyclic (QC) codes. The proposed hardware architecture is able to decode virtually any QC-LDPC code that fits into the allocated memories while achieving high decoding thro ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2008