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Scaling Up Concurrent Analytical Workloads on Multi-Core Servers

Related publications (29)

EdgeAI-Aware Design of In-Memory Computing Architectures

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

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Secure Interface Design Leveraging Hardware/Software Support

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Computer systems rely heavily on abstraction to manage the exponential growth of complexity across hardware and software. Due to practical considerations of compatibility between components of these complex systems across generations, developers have favou ...

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Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

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The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

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Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

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Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher pow ...

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Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads

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The increasing demand for computing power and the emergence of heterogeneous computing architectures have driven the exploration of innovative techniques to address current limitations in both the compute and memory subsystems. One such solution is the use ...

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Highly Parallel RTL Simulation

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

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The desire and ability to place AI-enabled applications on the edge has grown significantly in recent years. However, the compute-, area-, and power-constrained nature of edge devices are stressed by the needs of the AI-enabled applications, due to a gener ...

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Imaging sensor device using an array of single-photon avalanche diode photodetectors

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The invention relates to an Imaging sensor device in a stacked arrangement comprising: - a pixel array tier comprising a plurality of pixel segments each having a plurality of pixels for photon detection each providing a digital pixel output; - a processin ...

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Snowfall deposition in mountainous terrain: a statistical downscaling scheme from high-resolution model data on simulated topographies

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One of the primary causes of non-uniform snowfall deposition on the ground in mountainous regions is the preferential deposition of snow, which results from the interaction of near-surface winds with topography and snow particles. However, producing high-r ...

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Long plasma duration operation analyses with an international multi-machine (tokamaks and stellarators) database

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Combined high-fusion performance and long-pulse operation is one of the key integration challenges for fusion energy development in magnetic devices. Addressing these challenges requires an integrated vision of physics and engineering aspects with the purp ...

IOP Publishing Ltd2024