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Very Large Scale Computing Laboratory

Laboratory

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Very Large Scale Computing Laboratory

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An Heterogeneous Compiler Of Dataflow Programs For Zynq Platforms

Scalable Synchronization in Shared-Memory Systems: Extrapolating, Adapting, Tuning

Interleaving with coroutines: a systematic and practical approach to hide memory latency in index joins

Shared-variable Synchronization Approaches for Dynamic Data Flow Programs

Initialization patterns in Dotty

Buffer dimensioning for throughput improvement of dynamic dataflow signal processing applications on multi-core platforms

FPGAs for the Masses: Affordable Hardware Synthesis from Domain-Specific Languages

Automatic Generation of Efficient Accelerators for Reconfigurable Hardware

Programming Models and Methods for Heterogeneous Parallel Embedded Systems, 2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)

High-Precision Performance Estimation of Dynamic Dataflow Programs, 2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)