Drazen DujicDrazen Dujic is an Associate Professor and Head of the Power Electronics Laboratory at EPFL. He received the Dipl.Ing. and MSc degrees from the University of Novi Sad, Serbia in 2002 and 2005, respectively, and the PhD degree from Liverpool John Moores University, UK in 2008. From 2003 to 2006, he was a Research Assistant with the Faculty of Technical Sciences at University of Novi Sad. From 2006 to 2009, he was a Research Associate with Liverpool John Moores University. After that he moved to industry and joined ABB Switzerland Ltd, where from 2009 to 2013, he was Scientist and then Principal Scientist with ABB Corporate Research Center in Baden-Dättwil, and from 2013 to 2014 he was R&D Platform Manager with ABB Medium Voltage Drives in Turgi. He joined EPFL in 2014 as Tenure Track Assistant Professor and was promoted to Associate Professor in 2021. His research interests include the areas of design and control of advanced high power electronic systems and high-performance drives, predominantly for the medium voltage applications related to electrical energy generation, conversion and storage. He has authored or coauthored more than 150 scientific publications and has filed 16 patents. In 2018 he received EPE Outstanding Service Award from European Power Electronics and Drives Association and in 2014 the Isao Takahashi Power Electronics Award for Outstanding Achievement in Power Electronics. He is Senior Member of IEEE, and serves as Associate Editor for IEEE Transactions on Power Electronics, IEEE Transactions on Industrial Electronics and IET Electric Power Applications. He is Chairman of the Swiss IEEE Power Electronics Society (PELS) Chapter and IEEE PELS R8 Chair.
Alexandre SchmidAlexandre Schmid received the M.Sc. degree in microengineering and the Ph.D. degree in electrical engineering from the Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland, in 1994 and 2000, respectively. Since 1994, he has been with the EPFL, working with the Integrated Systems Laboratory as a Research and Teaching Assistant, and with the Electronics Laboratories as a Postdoctoral Fellow. In 2002, he was a Senior Research Associate with the Microelectronic Systems Laboratory, where he has been conducting research in the fields of bioelectronic interfaces and implantable biomedical electronics, nonconventional signal processing and neuromorphic hardware, and reliability of nanoelectronic devices, and also teaches with the Microengineering and Electrical Engineering Departments of EPFL. Since 2011, he is a Maître d'Enseignement et de Recherche (MER) Faculty Member with EPFL. He is a coauthor of two books, Reliability of Nanoscale Circuits and Systems, Methodologies and Circuit Architectures, Springer, 2011, and Wireless Cortical Implantable Systems, Springer, 2013, and a coeditor of one book, as well as over 100 articles published in journals and conferences.
Dr. Schmid has served as the General Chair of the Fourth International Conference on Nano-Networks in 2009 and has been serving as an Associate Editor of the Institute of Electrical, Information, and Communication Engineers Electronics Express since 2009.
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
