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Intel 4004

Publications associées (32)

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Self-Aligned 3D Chip Integration Technology and Through-Silicon Serial Data Transmission

Fengda Sun

The emerging three-dimensional (3D) integration technology is expected to lead to an industry paradigm shift due to its tremendous benefits. Intense research activities are going on about technology, simulation, design, and product prototypes. This thesis ...

EPFL2011

Very High Density Microelectrode Array with Monolithically Integrated Readout Circuits

Alexandre Schmid, Yusuf Leblebici, Neil Joye, Sedigheh Hashemi

This paper presents the hardware realization and modeling of high-density microelectrode arrays including both microelectronic readout amplifiers as well as three-dimensional microelectrodes forming a fully integrated CMOS compatible system enabling resear ...

2010

Optimizing Transactions for Captured Memory

Aleksandar Dragojevic

In this paper, we identify transaction-local memory as a major source of overhead from compiler instrumentation in software transactional memory (STM). Transaction-local memory is memory allocated inside a transaction, which cannot escape (i.e., is capture ...

ACM2009

Light structuring for massively parallel optical trapping

Johann Rohner

Optical trapping, discovered in the 70's, allows moving and stabilizing small objects which sizes varies from atoms to particles of several microns. This technique, based on momentum conservation, is particularly well suited for manipulating biological mat ...

EPFL2007

NoC emulation: a tool and design flow for MPSoC

Giovanni De Micheli, David Atienza Alonso, Luca Benini, Nicolas Genko

Current Systems-On-Chip (SoC) execute applications that demand extensive parallel processing; thus, the amount of processors, memories and application-specific signal pro- cessing cores is rapidly increasing. In these new Multi- Processor SoCs, (MPSoCs) on ...

2007

Improvements for Constraint Solving in the SystemC Verification Library

For verification of complex system-on-chip designs often constraint-based randomization is used. This allows to simulate scenarios that may be difficult to generate manually. For the system description language SystemC the SystemC Verification (SCV) Librar ...

2007

Improving instruction cache performance in OLTP

Anastasia Ailamaki

Instruction-cache misses account for up to 40%; of execution time in online transaction processing (OLTP) database workloads. In contrast to data cache misses, instruction misses cannot be overlapped with out-of-order execution. Chip design limitations do ...

Association for Computing Machinery2006

A Novel Approach for Network on Chip Emulation

Giovanni De Micheli, David Atienza Alonso, Luca Benini, Roman Hermida Correa, Nicolas Genko

Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon, and obviate the limitations of bus-based solutions. NoCs can have regular or a ...

2005

DNA detection by integrable electronics

Carlotta Guiducci, Giampaolo Zuccheri

This paper presents a new electronic methodology to detect DNA hybridization for rapid identification of diseases, as well as food and environmental monitoring on a genetic base. The proposed solution exploits a new (electrical) capacitive measurement circ ...

2004

Walking Four Machines By The Shore

Anastasia Ailamaki

Recent studies have shown that the hardware behavior of database workloads is suboptimal when compared to scientific workloads, and have identified the processor and memory subsystem as the true performance bottlenecks, when running decision-support worklo ...

2001