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Concept
Intel i860
Résumé
The Intel i860 (also known as 80860) is a RISC microprocessor design introduced by Intel in 1989. It is one of Intel's first attempts at an entirely new, high-end instruction set architecture since the failed Intel iAPX 432 from the beginning of the 1980s. It was the world's first million-transistor chip. It was released with considerable fanfare, slightly obscuring the earlier Intel i960, which was successful in some niches of embedded systems. The i860 never achieved commercial success and the project was terminated in the mid-1990s.
The first implementation of the i860 architecture is the i860 XR microprocessor (code-named N10), which ran at 25, 33, or 40 MHz. The second-generation i860 XP microprocessor (code named N11) added 4 Mbyte pages, larger on-chip caches, second level cache support, faster buses, and hardware support for bus snooping, for cache consistency in multiprocessor systems. A process shrink for the XP (from 1 μm to 0.8 CHMOS V) increased the clock to 40 and 50 MHz. Both microprocessors supported the same instruction set for application programs.
The i860 combined a number of features that were unique at the time, most notably its very long instruction word (VLIW) architecture and powerful support for high-speed floating-point operations. The design uses two classes of instructions: "core" instructions which use a 32-bit ALU, and "floating-point or graphics" instructions which operate on a floating-point adder, a floating-point multiplier, or a 64-bit integer graphics unit. The system had separate pipelines for the ALU, floating-point adder, floating-point multiplier, and graphics unit. It can fetch and decode one "core" instruction and one "floating-point or graphics" instruction per clock. When using dual-operation floating-point instructions (which transfer values between subsequent dual-operation instructions), it is able to execute up to three operations (one ALU, one floating-point multiply, and one floating-point add-or-subtract) per clock.
All of the data buses were at least 64 bits wide.
Source officielle
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