Maher KayalMaher Kayal received M.S. and Ph.D degrees in electrical engineering from the Ecole Polytechnique Fédérale de Lausanne (EPFL, Switzerland) in 1983 and 1989 respectively. He has been with the Electronics laboratories of the Ecole Polytechnique Fédérale de Lausanne (EPFL, Switzerland) since 1990, where he is currently a professor and director of the Energy Management and Sustainability" section. He has published many scientific papers, coauthor of three text books dedicated to mixed-mode CMOS design and he holds eleven patents. His technical contributions have been in the area of analog and Mixed-signal circuits design including highly linear and tunable sensors microsystems, signal processing and green energy management. Prizes and Honors : Electronics Letters journal Premium Award 2013, Outstanding Paper Award? IEEE Mixdes 2013 Basil Papadias paper Award, IEEE Powertech 2013 Best Paper Awards, Mixdes 2013 Best Paper Awards, ICCAS 2012 Outstanding Paper Award- IEEE Mixdes 2012. Poland Section IEEE ED Chapter special award in 2011. Credit Suisse Award for Best Teaching- 2009. The William M. Portnoy Award at the Energy Conversion Congress and Exposition , California Sept 2009. Best Paper Award - IEEE-Mixdes 2009. High Quality Paper - IEEE Power Tech Conference June 2009. Best Paper Award - IEEE-Mixdes 2007. Best Paper Award - IEEE-TTTC International Conference on Automation, Quality and Testing, Robotics - 2006. Best Application Specific Integrated Circuit at the International European Design and Test Conference ED&TC - 1997. Ascom Award for the Best Work in Telecommunication Fields 1990. Publications Books. Books: Methodology for the Digital Calibration of Analog Circuits and Systems, Marc Pastre & Maher Kayal. Springer Publisher- (ISBN 1-4020-4252-3)-2006. Structured Analog CMOS Design, Danica Stefanovic & Maher Kayal. Springer Publisher-(ISBN 978-1-4020-8572-7)-2008. Linear CMOS RF Amplifiers for Wireless Applications, Maher Kayal, Springer Publisher. (ISBN 978-90-481-9360-8)-2010. Coeditor of Microelectronics Education Kluwer Academic Publishers. (ISBN 1-4020-2072-4). -2004.
Mihai Adrian IonescuD'origine et de nationalités roumaine et suisse, Mihai-Adrian Ionescu est né en 1965. Après le doctorat en Physique des Composants à Semiconducteurs de lInstitut National Polytechnique de Grenoble, M. Ionescu a travaillé comme chercheur post-doctoral au LETI-CEA Grenoble, sur la caractérisation des diélectriques low-k pour les technologies submicroniques CMOS. Après une courte période au sein du CNRS, comme chargé de recherche 1ere Classe il a effectué un séjour post-doctoral au Center for Integrated Systems, Stanford University, USA. Actuellement il est Professeur Nanoélectronique à lEcole Polytechnique Fédérale de Lausanne.
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
David Atienza AlonsoDavid Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.
Andreas Peter BurgAndreas Burg was born in Munich, Germany, in 1975. He received his Dipl.-Ing. degree in 2000 from the Swiss Federal Institute of Technology (ETH) Zurich, Zurich, Switzerland. He then joined the Integrated Systems Laboratory of ETH Zurich, from where he graduated with the Dr. sc. techn. degree in 2006.
In 1998, he worked at Siemens Semiconductors, San Jose, CA. During his doctoral studies, he was an intern with Bell Labs Wireless Research for a total of one year. From 2006 to 2007, he held positions as postdoctoral researcher at the Integrated Systems Laboratory and at the Communication Theory Group of the ETH Zurich. In 2007 he co-founded Celestrius, an ETH-spinoff in the field of MIMO wireless communication, where he was responsible for the ASIC development as Director for VLSI. In January 2009, he joined ETH Zurich as SNF Assistant Professor and as head of the Signal Processing Circuits and Systems group at the Integrated Systems Laboratory.
In January 2011, he became a Tenure Track Assistant Professor at the Ecole Polytechnique Federale de Lausanne (EPFL) where he is leading the Telecommunications Circuits Laboratory in the School of Engineering. In June 2018 he was promoted to the role of a Tenured Associate Professor.
In 2000, Mr. Burg received the Willi Studer Award and the ETH Medal for his diploma and his diploma thesis, respectively. Mr. Burg was also awarded an ETH Medal for his Ph.D. dissertation in 2006. In 2008, he received a 4-years grant from the Swiss National Science Foundation (SNF) for an SNF Assistant Professorship. In his professional career, Mr. Burg was involved in the development of more than 25 ASICs. He is a member of the IEEE and of the European Association for Signal Processing (EURASIP).
Research interests and expertise
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Circuits and systems for telecommunications (wireless and wired)
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Prototyping and silicon implementation of new communication technologies
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Development of communication algorithms and optimization for hardware implementation
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Low-power VLSI signal processing for communications and other applications
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Digital integrated circuits
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Circuits for image and video processing
Catherine DehollainShe got the Master Degree in Electrical Engineering in 1982 from EPFL. Then, she worked in Geneva up to 1990 as a Senior Design Engineer in telecommunications at the European research center of Motorola. From 1990 up to 1995, she did her PhD thesis at the Chaire des Circuits et Systemes at EPFL in the domain of impedance broadband matching circuits. Since 1995, she is responsible at EPFL for the RFIC group. She has participated to different Swiss research projects as well as European projects dedicated to data communication of sensors nodes (e.g. MuMoR, Minami European projects) as well as remote powering of sensor nodes. Her main domains of interest are telecom applications (e.g. Impulse radio Ultra-Wide Band, super-regenerative receivers, RFIDs)as well as biomedical applications. She has been the coordinator of European projects (e.g. FP6 SUPREGE, FP7 Ultrasponder)and of Swiss projects (e.g. CAPED CTI project, NEURO-IC SNF project).
Jürgen BruggerI am a Professor of Microengineering and co-affiliated to Materials Science. Before joining EPFL I was at the MESA Research Institute of Nanotechnology at the University of Twente in the Netherlands, at the IBM Zurich Research Laboratory, and at the Hitachi Central Research Laboratory, in Tokyo, Japan. I received a Master in Physical-Electronics and a PhD degree from Neuchâtel University, Switzerland. Research in my laboratory focuses on various aspects of MEMS and Nanotechnology. My group contributes to the field at the fundamental level as well as in technological development, as demonstrated by the start-ups that spun off from the lab. In our research, key competences are in micro/nanofabrication, additive micro-manufacturing, new materials for MEMS, increasingly for wearable and biomedical applications. Together with my students and colleagues we published over 200 peer-refereed papers and I had the pleasure to supervise over 25 PhD students. Former students and postdocs have been successful in receiving awards and starting their own scientific careers. I am honoured for the appointment in 2016 as Fellow of the IEEE “For contributions to micro and nano manufacturing technology”. In 2017 my lab was awarded an ERC AdvG in the field of advanced micro-manufacturing.
Sandro CarraraSandro Carrara a été nommé IEEE Fellow pour ses remarquables réalisations dans le domaine de la conception de biocapteurs CMOS à l'échelle nanométrique. Il a également reçu le prix "IEEE Sensors Council Technical Achievement Award" en 2016 pour son leadership dans le domaine émergent du co-design des interfaces Bio/Nano/CMOS. Il est un Professeur titulaire à l' EPFL à Lausanne (Suisse) et responsable du groupe de recherche "Bio/CMOS Interfaces" (BCI). Il est ancien professeur de biocapteurs optiques et électriques au Département de génie électrique et de biophysique (DIBE) de l'Université de Gênes (Italie) et ancien professeur de nanotechnologie à l'Université de Bologne (Italie). Il est titulaire d'un doctorat en biochimie et de biophysique de l'Université de Padoue (Italie), une master en physique de l'Université de Gênes (Italie), et un diplôme en électronique de l'Institut National de Technologie à Albenga (Italie). Ses intérêts scientifiques sont sur les phénomènes électriques de films nano-bio-structuré, et comprennent CMOS conception de biopuces à base de protéines et de l'ADN. Le long de sa carrière, il a publié 7 livres, l'un comme auteur avec Springer sur les interfaces Bio/CMOS et, plus récemment, un manuel de bioélectronique avec La prestigieuse Cambridge University Press. Il a également publié plus de 250 articles scientifiques et est l'auteur de 13 brevets. Il est maintenant chef rédacteur du Journal IEEE Sensors; il est également fondateur et chef rédacteur du Journal BioNanoScience par Springer, et rédacteur adjoint de IEEE Transactions on Circuits and Biomedical Systems. Il est membre du IEEE Sensors Council et de son comité exécutif. Il était membre du Conseil des gouverneurs de la IEEE Circuits And Systems Society (CASS). Il a été nommé IEEE conférencier émérite pour les années 2017-2019 pour le Conseil IEEE Sensors, et de la société CASS pour les années 2013-2014. Son travail a reçu plusieurs reconnaissances internationales: plusieurs Top-25 Hottest-articles (2004, 2005, 2008, 2009, et deux fois en 2012) publiés dans des journaux internationales très fort impact telles que Biosensors and Bioelectronics, Sensors And Actuators B, IEEE Sensors, et Thin Solid Films; un Award à une conference de l'OTAN en 1996 pour la contribution originale à la physique de la conductivité à électron unique dans les nano-particules; six "Best Paper Awards" pour des articles présentés à la conférence IEEE Sensors Conference en 2019 (Montreal), IEEE NGCAS en 2017 (Genoa), MOBIHEALTH en 2016 (Milan), IEEE PRIME en 2015 (Glasgow), en 2010 (Berlin) et en 2009 (Cork), un prix de la meilleure affiche au rencontre annuel de Nanotera en 2011 (Berne), et un prix de la meilleure affiche au NanoEurope Symposium en 2009 (Rapperswil). De 1997 à 2000, il a été membre d'un comité international au ELETTRA Synchrotron à Trieste. De 2000 à 2003, il était responsable scientifique d'un Programme national de recherche (PNR) dans le dépôt de nanobiotechnologie. Il était un expert internationalement estimé du comité d'évaluation de l'Académie de Finlande dans un programme de recherche pour les années 2010-2013. Il a été le président général (General Chair) de la Conférence IEEE BioCAS 2014, le premier conférence internationale dans le domaine des circuits et des systèmes pour les applications biomédicales.
