Mohammad Amin ShokrollahiAmin Shokrollahi has worked on a variety of topics, including coding theory, computational number theory and algebra, and computational/algebraic complexity theory. He is best known for his work on iterative decoding algorithms of graph based codes, an area in which he holds a number of granted and pending patents. He is the co-inventor of Tornado codes, and the inventor of Raptor codes. His codes have been standardized and successfully deployed in practical areas dealing with data transmission over lossy networks.
Prior to joining EPFL, Amin Shokrollahi has held positions as the chief scientist of Digital Fountain, member of the technical staff at Bell Laboratories, senior researcher at the International Computer Science Insitute in Berkeley, and assistant professor at the department of computer science of the university of Bonn. He is a Fellow of the IEEE, and he was awarded the Best Paper Award of the IEEE IT Society in 2002 for his work on iterative decoding of LDPC code, the IEEE Eric Sumner Award in 2007 for the development of Fountain Codes, and the joint Communication Society/Information Theory Society best paper award of 2007 for his paper on Raptor Codes.
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
Yves BellouardDr. Yves Bellouard is Associate Professor in Microengineering at Ecole Polytechnique Fédérale de Lausanne (EPFL) in Switzerland, where he heads the Galatea lab and the Richemont Chair in micromanufacturing. He received a BS in Theoretical Physics and a MS in Applied Physics from Université Pierre et Marie Curie in Paris, France in 1994-1995 and a PhD in Microengineering from Ecole Polytechnique Fédérale de Lausanne (EPFL) in Lausanne, Switzerland in 2000. For his PhD work, he received the Omega Scientific prize (2001) for outstanding contribution in the field of microengineering for his work on Shape Memory Alloys. Before joining EPFL in 2015, he was Associate Professor at Eindhoven University of Technologies (TU/e) in the Netherlands and prior to that, Research Scientist at Rensselaer Polytechnic Institute (RPI) in Troy, New York for about four years where he started working on femtosecond laser processing of glass materials. From 2010 until 2013, Yves Bellouard initiated and coordinated the Femtoprint project, a European research initiative aiming at investigating a table-top printer for microsystems ('3D printing of microsystems'). In 2013, he received a prestigious ERC Starting Grant (Consolidator-2012) from the European Research Council and a JSPS Fellowship from the Japan Society for the Promotion of Science. His current research interests are on new paradigms for system integration at the microscale and in particular laser-based methods to tailor material properties for achieving higher level of integration in microsystems, like for instance integrating optics, mechanics and fluidics in a single monolith. These approaches open new opportunities for direct-write methods of microsystems (3D printing). Personal website
Farzan JazaeriFarzan Jazaeri received his M.Sc. degree in 2009 from University of Tehran and his Ph.D. in electronic engineering from EPFL in 2015. He has been serving as Research Scientist at EPFL since 2015 and Senior RD Semiconductor Device Engineer in the Swatch Company since 2019.He is a recipient of the 2018 Electron Devices Society George E. Smith Award, the best talk award from MIXDES 2019 and the best paper awards from ESSDERC2018 and ESSDERC2019, and several other academic awards. He is also awarded an advanced Swiss National Science Foundation grant for two years fellowship in MIT and NASA. His doctoral thesis was recognized to be eligible for the IBM award in 2017. Dr. Jazaeri is currently research scientist and project leader in high level of international scientific collaborative activities at EPFL. His research activities on solid-state physics are focused on creation of the cryogenic temperature infrastructure necessary to operate the qubits for quantum computations(MOSQUITO), radiation-induced damages in advanced devices for the future high energy physics experiments at CERN (GigaRadMOST), Pinned Photodiodes for CIS, and modeling and characterization AlGaN-GaN heterostructure in collaboration with IMEC. Together with Dr. Sallese, he is the lead developer of EPFL HEMT MODEL for GaN HEMTs. He fully developed a new model (EPFL-JL Model) for the so-called nanowire FETs and was invited by Cambridge University Press to write a book on junctionless nanowire FETs, emerging nanoelectronic devices, already published since 2018. He serves as lead editor and reviewer for several scientific journals. He has been an invited keynote speaker at several international conferences and events. He is invited to MIXDES 2019 as a keynote speaker to address quantum bits and quantum computing architecture.From Jun 2009 to February 2010, he worked on designing and implementing SD/HD broadcast systems with SAMIM-RAYANEH Co., Tehran, Iran. Between March 2010 and November 2011 he worked as a SCADA expert in Tehran Regional Electric Co. (TREC), Tehran, Iran. From September 2010 to December 2011, he continued his research activities in nano-electronics in Tehran, Iran. In December 2011, he joined to Electron Device Modelling and Technology Lab (EDLab) and pursued his Ph.D. degree at EPFL. In 2015, he received his Ph.D. from Microsystems and Microelectronics department, Integrated Systems Laboratory (STI/IC) at EPFL, Lausanne, Switzerland.
