Publications associées à Unité de gestion de mémoire

Analysis system and method for analysing the movement of a portion of the body and/or of a human prosthesis

Silvestro Micera, Andrea Crema, Fiorenzo Artoni

An analysis method (200) for analysing the pressure exerted by a portion of the body and/or of a human prosthesis comprises the following steps: sampling data generated by the portion of the body and/or the human prosthesis during a threshold calibration p ...

2021

Rebooting Virtual Memory with Midgard

Babak Falsafi, Mathias Josef Payer, Siddharth Gupta, Atri Bhattacharyya, Yunho Oh, Abhishek Bhattacharjee

Computer systems designers are building cache hierarchies with higher capacity to capture the ever-increasing working sets of modern workloads. Cache hierarchies with higher capacity improve system performance but shift the performance bottleneck to addres ...

2021

Rethinking Software Runtimes for Disaggregated Memory

Sanidhya Kashyap, Ivan Puddu

Disaggregated memory can address resource provisioning inefficiencies in current datacenters. Multiple software runtimes for disaggregated memory have been proposed in an attempt to make disaggregated memory practical. These systems rely on the virtual mem ...

ASSOC COMPUTING MACHINERY2021

Access pattern based optimization of memory access

Anastasia Ailamaki, Georgios Psaropoulos

A method for optimizing memory access for database operations is provided. The method may include identifying an access pattern associated with a database operation. The access pattern may include data required to perform the database operation. One or mor ...

2020

SPARTA: A Divide and Conquer Approach to Address Translation for Accelerators

Babak Falsafi, Javier Picorel Obando, Abhishek Bhattacharjee

Virtual memory (VM) is critical to the usability and programmability of hardware accelerators. Unfortunately, implementing accelerator VM efficiently is challenging because the area and power constraints make it difficult to employ the large multi-level TL ...

2020

Gain-Cell Embedded DRAMs: Modeling and Design Space

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Andrea Bonetti

Among the different types of DRAMs, gain-cell embedded DRAM (GC-eDRAM) is a compact, low-power and CMOS-compatible alternative to conventional SRAM. GC-eDRAM achieves high memory density as it relies on a storage cell that can be implemented with as few as ...

IEEE2020

Gain-Cell Embedded DRAMs: Modeling and Design Space

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Andrea Bonetti

Among the different types of dynamic random-access memories (DRAMs), gain-cell embedded DRAM (GC-eDRAM) is a compact, low-power, and CMOS-compatible alternative to conventional static random-access memory (SRAM). GC-eDRAM achieves high memory density, as i ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

SixTrack Version 5: Status and New Developments

Giovanni Iadarola, Igor Zacharov, Riccardo De Maria, Dario Pellegrini, Massimo Giovannozzi

SixTrack Version 5 is a major SixTrack release that introduces new features, with improved integration of the existing ones, and extensive code restructuring. New features include dynamic-memory management, scattering-routine integration, a new initial-con ...

IOP PUBLISHING LTD2019

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Unité de gestion de mémoire

Analysis system and method for analysing the movement of a portion of the body and/or of a human prosthesis

Rebooting Virtual Memory with Midgard

Rethinking Software Runtimes for Disaggregated Memory

Learning continuous-time working memory tasks with on-policy neural reinforcement learning

Access pattern based optimization of memory access

SPARTA: A Divide and Conquer Approach to Address Translation for Accelerators

Gain-Cell Embedded DRAMs: Modeling and Design Space

Gain-Cell Embedded DRAMs: Modeling and Design Space

Using an antenna as a tool for studying microturbulence and zonal structures in tokamaks with a global gyrokinetic GPU-enabled particle-in-cell code

SixTrack Version 5: Status and New Developments

Graph Chatbot

Chattez avec Graph Search

Rethinking Software Runtimes for Disaggregated Memory

Analysis system and method for analysing the movement of a portion of the body and/or of a human prosthesis

Access pattern based optimization of memory access

Learning continuous-time working memory tasks with on-policy neural reinforcement learning

Rebooting Virtual Memory with Midgard

Gain-Cell Embedded DRAMs: Modeling and Design Space

Using an antenna as a tool for studying microturbulence and zonal structures in tokamaks with a global gyrokinetic GPU-enabled particle-in-cell code

Gain-Cell Embedded DRAMs: Modeling and Design Space

SPARTA: A Divide and Conquer Approach to Address Translation for Accelerators

SixTrack Version 5: Status and New Developments