Michel BierlaireBorn in 1967, Michel Bierlaire holds a PhD in Mathematical Sciences from the Facultés Universitaires Notre-Dame de la Paix, Namur, Belgium (University of Namur). Between 1995 and 1998, he was research associate and project manager at the Intelligent Transportation Systems Program of the Massachusetts Institute of Technology (Cambridge, Ma, USA). Between 1998 and 2006, he was a junior faculty in the Operations Research group ROSO within the Institute of Mathematics at EPFL. In 2006, he was appointed associate professor in the School of Architecture, Civil and Environmental Engineering at EPFL, where he became the director of the Transport and Mobility laboratory. Since 2009, he is the director of TraCE, the Transportation Center. From 2009 to 2017, he was the director of Doctoral Program in Civil and Environmental Engineering at EPFL. In 2012, he was appointed full professor at EPFL. Since September 2017, he is the head of the Civil Engineering Institute at EPFL. His main expertise is in the design, development and applications of models and algorithms for the design, analysis and management of transportation systems. Namely, he has been active in demand modeling (discrete choice models, estimation of origin-destination matrices), operations research (scheduling, assignment, etc.) and Dynamic Traffic Management Systems. As of August 2021, he has published 136 papers in international journals, 4 books, 41 book chapters, 193 articles in conference proceedings, 182 technical reports, and has given 195 scientific seminars. His Google Scholar h-index is 68. He is the founder, organizer and lecturer of the EPFL Advanced Continuing Education Course "Discrete Choice Analysis: Predicting Demand and Market Shares". He is the founder of hEART: the European Association for Research in Transportation. He was the founding Editor-in-Chief of the EURO Journal on Transportation and Logistics, from 2011 to 2019. He is an Associate Editor of Operations Research. He is the editor of two special issues for the journal Transportation Research Part C. He has been member of the Editorial Advisory Board (EAB) of Transportation Research Part B since 1995, of Transportation Research Part C since January 1, 2006.
Volkan CevherVolkan Cevher received the B.Sc. (valedictorian) in electrical engineering from Bilkent University in Ankara, Turkey, in 1999 and the Ph.D. in electrical and computer engineering from the Georgia Institute of Technology in Atlanta, GA in 2005. He was a Research Scientist with the University of Maryland, College Park from 2006-2007 and also with Rice University in Houston, TX, from 2008-2009. Currently, he is an Associate Professor at the Swiss Federal Institute of Technology Lausanne and a Faculty Fellow in the Electrical and Computer Engineering Department at Rice University. His research interests include machine learning, signal processing theory, optimization theory and methods, and information theory. Dr. Cevher is an ELLIS fellow and was the recipient of the Google Faculty Research award in 2018, the IEEE Signal Processing Society Best Paper Award in 2016, a Best Paper Award at CAMSAP in 2015, a Best Paper Award at SPARS in 2009, and an ERC CG in 2016 as well as an ERC StG in 2011.
Ali H. SayedAli H. Sayed est doyen de la Faculté des sciences et techniques de l’ingénieur (STI) de l'EPFL, en Suisse, où il dirige également le laboratoire de systèmes adaptatifs. Il a également été professeur émérite et président du département d'ingénierie électrique de l'UCLA. Il est reconnu comme un chercheur hautement cité et est membre de la US National Academy of Engineering. Il est également membre de l'Académie mondiale des sciences et a été président de l'IEEE Signal Processing Society en 2018 et 2019.
Le professeur Sayed est auteur et co-auteur de plus de 570 publications et de six monographies. Ses recherches portent sur plusieurs domaines, dont les théories d'adaptation et d'apprentissage, les sciences des données et des réseaux, l'inférence statistique et les systèmes multi-agents, entre autres.
Ses travaux ont été récompensés par plusieurs prix importants, notamment le prix Fourier de l'IEEE (2022), le prix de la société Norbert Wiener (2020) et le prix de l'éducation (2015) de la société de traitement des signaux de l'IEEE, le prix Papoulis (2014) de l'Association européenne de traitement des signaux, le Meritorious Service Award (2013) et le prix de la réalisation technique (2012) de la société de traitement des signaux de l'IEEE, le prix Terman (2005) de la société américaine de formation des ingénieurs, le prix de conférencier émérite (2005) de la société de traitement des signaux de l'IEEE, le prix Koweït (2003) et le prix Donald G. Fink (1996) de l'IEEE. Ses publications ont été récompensées par plusieurs prix du meilleur article de l'IEEE (2002, 2005, 2012, 2014) et de l'EURASIP (2015). Pour finir, Ali H. Sayed est aussi membre de l'IEEE, d'EURASIP et de l'American Association for the Advancement of Science (AAAS), l'éditeur de la revue Science.
David Atienza AlonsoDavid Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.