Concept

Motorola 6800

Publications associées (21)

Sensing Mechanisms for Carbon Nanotube Based NH3 Gas Detection

There has been an argument on carbon nanotube (CNT) based gas detectors with a field-effect transistor (FET) geometry: do the response signals result from charge transfer between adsorbed gas molecules and the CNT channel and/or from the gas species induce ...

2009

Hysteretic inverter-on-a-body-tied-wire based on less-than-10mV/decade abrupt punch-through impact ionization MOS (PIMOS) switch

Mihai Adrian Ionescu, Didier Bouvet, Kirsten Emilie Moselund, Vincent Pott

This work reports for the first time on a cascadable NMOS inverter based on punch-through impact ionization MOSFET (PIMOS) integrated on a single body-tied silicon wire. The PIMOS device acts as a single-transistor-latch and shows abrupt current switching ...

2008

Ultra low power subthreshold current-mode logic utilizing a novel PMOS load device

Seyed Armin Tajalli, Eric Vittoz, Yusuf Leblebici

A novel approach for implementing MOS current-mode logic (MCML) circuits that can operate with ultra low bias currents is introduced. Measurements of test structures fabricated in 0.18 μm CMOS technology show that the proposed PMOS load device concept can ...

2007

A profiling framework for high level design space exploration for memory and system architectures

In 1971, the first microprocessor produced in mass production had 2300 transistor and was able to compute 60'000 operations per second at 740 kHz. Nowadays, even a common gaming console uses a central unit including 243 millions of transistors running at 4 ...

EPFL2007

A hybrid CMOS-SET co-fabrication platform using nano-grain polysilicon wires

Mihai Adrian Ionescu, Didier Bouvet, Vincent Pott, Santanu Mahapatra, Serge Ecoffey

This paper presents a process for the co-fabrication of self-aligned NMOS and single electron transistors made by gated polysilicon wires. The realization of SET–MOS hybrid architectures is also reported. The proposed process exploits an original low energ ...

2005

A clean wafer-scale chip-release process without dicing based on vapor phase etching

Nico de Rooij, Wilfried Noell

A new method to release MEMS chips from a wafer without dicing is presented. It can be applied whenever SOI wafers are used that are structured from both the device and the handle side using DRIE. This method enables the release of extremely fragile struct ...

2004

Dynamically Tuning Processor Resources with Adaptive Processing

Sandhya Dwarkadas

The productivity of modern society has become inextricably linked to its ability to produce energy-efficient computing technology. Increasingly sophisticated mobile computing systems, powered for hours solely by batteries, continue to proliferate rapidly t ...

2003

Decorrelated Fast Cipher: an AES candidate well suited for low cost smart cards applications

Serge Vaudenay

In response to the call for candidates issued by the National Institute for Standards and Technologies (the Advanced Encryption Standard project) the Ecole Normale Superieure proposed a candidate called DFC (Decorrelated Fast Cipher). DFC is based on a dec ...

2000

Mechanisms for Cooperative Shared Memory

Babak Falsafi, James Richard Larus, David Wood

We introduce a new organization for multi-bank caches: the skewed-associative cache. A two-way skewed-associative cache has the same hardware complexity as a two-way set-associative cache, yet simulations show that it typically exhibits the same hit ratio ...

1994

Compiling for Shared-Memory and Message-Passing Computers

James Richard Larus

ACM1993

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