Concept

Advanced Configuration and Power Interface

Publications associées (13)

Power Production and Blade Fatigue of a Wind Turbine Array Subjected to Active Yaw Control

This study investigated the power production and blade fatigue of a three-turbine array subjected to active yaw control (AYC) in full-wake and partial-wake configurations. A framework of a two-way coupled large eddy simulation (LES) and an aeroelastic blad ...

MDPI2023

Wind Turbine Wakes in Active Yaw Control: Numerical and Theoretical Studies

Mou Lin

In this thesis, we explore the best practice of simulating the wakes of the turbines under active yaw control (AYC) using large-eddy simulation (LES). In the first study, we validate the blade-element actuator disk model (ADM-BE) for a yawed wind turbine. ...

EPFL2023

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Sahand Kashani

The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators.Specialized hardware has already redefined ...

EPFL2023

ECOGreen: Electricity Cost Optimization for Green Datacenters in Emerging Power Markets

David Atienza Alonso, Marina Zapater Sancho, Ayse Kivilcim Coskun, Ali Pahlevan

Modern datacenters need to tackle efficiently the increasing demand for computing resources while minimizing energy usage and monetary costs. Power market operators have recently introduced emerging demand-response programs, in which electricity consumers ...

2020

Adaptive Receiver Design for High Speed Optical Communication

Ilter Ozkaya

Conventional input/output (IO) links consume power, independent of changes in the bandwidth demand by the system they are deployed in. As the system is designed to satisfy the peak bandwidth demand, most of the time the IO links are idle but still consumin ...

EPFL2018

Design techniques for a stable operation of cryogenic field-programmable gate arrays

Edoardo Charbon, Harald Arjan Robert Homulle

In this paper, we show how a deep-submicron field-programmable gate array (FPGA) can be operated more stably at extremely low temperatures through special firmware design techniques. Stability at low temperatures is limited through long power supply wires ...

2018

Spatial: A Language and Compiler for Application Accelerators

Christos Kozyrakis, Yunqi Zhang

Industry is increasingly turning to reconfigurable architectures like FPGAs and CGRAs for improved performance and energy efficiency. Unfortunately, adoption of these architectures has been limited by their programming models. HDLs lack abstractions for pr ...

ASSOC COMPUTING MACHINERY2018

Dynamic Fine-Grained Scheduling for Energy-Efficient Main-Memory Queries

Anastasia Ailamaki, Pinar Tözün, Danica Porobic, Iraklis Psaroudakis, Erietta Liarou

Power and cooling costs are some of the highest costs in data centers today, which make improvement in energy efficiency crucial. Energy efficiency is also a major design point for chips that power whole ranges of computing devices. One important goal in t ...

2014

Synthesis and optimization of high-level stream programs

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

In this paper we address the problem of translating high-level stream programs, such as those written in MPEG's RVC-CAL dataflow language, into implementations in programmable hardware. Our focus is on two aspects: sufficient language coverage to make synt ...

2013

Synthesis And Optimization Of High-Level Stream Programs

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

Ieee2013

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