Segment d'état de tâcheUn segment d'état de tâche ou Task state segment (TSS) est une structure spécifique aux processeurs de la famille x86 où est stockée tout le contexte d'un processus. Son descripteur est placé dans la GDT (Table globale de descripteurs). En tant que segment, les segments d'état de tâche sont référencés par des descripteurs d'état de tâche (TSSD) situés dans la GDT.
Gracemont (microarchitecture)Gracemont is a microarchitecture for low-power processors used in systems on a chip (SoCs) made by Intel, and is the successor to Tremont. Like its predecessor, it is also implemented as low-power cores in a hybrid design of the Alder Lake and Raptor Lake processors. Gracemont is the fourth generation out-of-order low-power Atom microarchitecture, built on the Intel 7 manufacturing process.
Memory-mapped fileA memory-mapped file is a segment of virtual memory that has been assigned a direct byte-for-byte correlation with some portion of a file or file-like resource. This resource is typically a file that is physically present on disk, but can also be a device, shared memory object, or other resource that the operating system can reference through a . Once present, this correlation between the file and the memory space permits applications to treat the mapped portion as if it were primary memory.
Piledriver (microarchitecture)AMD Piledriver Family 15h is a microarchitecture developed by AMD as the second-generation successor to Bulldozer. It targets desktop, mobile and server markets. It is used for the AMD Accelerated Processing Unit (formerly Fusion), AMD FX, and the Opteron line of processors. The changes over Bulldozer are incremental. Piledriver uses the same "module" design. Its main improvements are to branch prediction and FPU/integer scheduling, along with a switch to hard-edge flip-flops to improve power consumption.
