Concept

Silicon Valley

Publications associées (43)

Automatic Generation of Inexact Digital Circuits by Gate-level Pruning

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter

Inexact or approximate circuits show great ability to reduce power consumption at the cost of occasional errors in comparison to their conventional counterparts. Even though the benefits of such circuits have been proven for many applications, they are not ...

2015

Method to fabricate finfet sensors, in particular, finfet sensors for ionic, chemical and biological applications on si-bulk

Mihai Adrian Ionescu, Sara Rigante

The present invention relates to a method of producing a FinFET sensor device comprising the steps of: providing a silicon substrate; etching the silicon substrate to produce at least one upwardly extending Fin structure externally protruding from a surfac ...

2015

Characterization and analysis of InAs/p-Si heterojunction nanowire-based solar cell

Anna Fontcuberta i Morral, Federico Matteini, Esther Alarcon Llado, Eleonora Russo, Anna Dalmau Mallorquí

The growth of compound semiconductor nanowires on the silicon platform has opened many new perspectives in the area of electronics, optoelectronics and photovoltaics. We have grown a 1 x 1 mm(2) array of InAs nanowires on p-type silicon for the fabrication ...

Institute of Physics2014

Memristive Biosensors Under Varying Humidity Conditions

Giovanni De Micheli, Sandro Carrara, Davide Sacchetto, Yusuf Leblebici, Camilla Baj-Rossi, Francesca Puppo, Akshat Dave

We attempt to examine the potential of silicon nanowire memristors in the field of nanobiosensing. The mem- ristive devices are crystalline Silicon (Si) Nanowires (NWs) with Nickel Silicide (NiSi) terminals. The nanowires are fabricated on a Silicon-on-Ins ...

Institute of Electrical and Electronics Engineers2014

A Novel Compressive Sensing Architecture for High-Density Biological Signal Recording

Alexandre Schmid, Mahsa Shoaran, Hossein Afshari

The massive amount of data recorded by dense electrode arrays which are routinely connected to Nyquist-sampling signal conditioning blocks introduces new design challenges for implantable and wireless biological signal acquisition. Five different architect ...

2014

Single Suspended Silicon Nanowire Fabrication With Ultra-Deep Trench Etching

Davide Sacchetto, Zuhal Tasdemir

For the last 60 years, a dramatic downscaling of electronics has taken place. This trend of miniaturization has gained the support of the industry and the roadmap for downscaling and introducing new technologies in the semiconductor industry has been well ...

2014

Through Silicon Vias and thermocompression bonding using inkjet-printed gold nanoparticles for heterogeneous MEMS integration

Niels Quack

We present a novel technique for heterogeneous integration using gold filled Through Silicon Vias (TSV) and thermocompression bond bumps formed in a single fabrication step, using gold nanoparticles dispensed by inkjet printing. Gold-filled TSV arrays (12 ...

IEEE2013

Offset Compensation Based on Distributed Hall Cell Architecture

Pierre-André Farine, Pavel Kejik, Pierre-François Thibault Bourdelle

A new offset reduction strategy for CMOS Hall devices is proposed. The novelty is to fragment the Hall device into multiple Hall blocks, distributed over the silicon area and easy to interconnect. The suitable number of Hall blocks and the bias current lev ...

Institute of Electrical and Electronics Engineers2013

Offset Compensation Based on Distributed Hall Cell Architecture

Pierre-André Farine, Pavel Kejik, Pierre-François Thibault Bourdelle

Ieee-Inst Electrical Electronics Engineers Inc2013

3.5-D Integration: A Case Study

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Vasileios Pavlidis, Shashi Kanth Bobba, Ciprian Seiculescu

Two diverse manufacturing techniques for building 3-D integrated systems are vertical integration with Through-Silicon-Vias (TSVs), also referred to as 3-D TSV integration, and 3-D monolithic integration. In this paper, we present a hybrid integration sche ...

2013

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