Pierre-André FarinePierre-André Farine received the Doctoral and Engineering Degrees in Microtechnology from University of Neuchâtel, Switzerland, respectively in 1984 and 1978, and the Engineering in Microtechnology from ETS Le Locle in 1974.
He was working 17 years for the Swiss watch industries (Swatch Group), including developments for high-tech products, such as pager watches, watches including integrated sensors such as pressure, compass, altimeter and temperature sensors for Tissot. He was also involved in prototypes developments for watches including GPS and cellular GSM phones.
Since 8 years, he is Professor in Electronics and Signal Processing at the Institute of Microtechnology IMT, University of Neuchâtel, Switzerland. Full professor at EPFL since January 1st, 2009, he works in the field of low-power integrated products for portable devices, including microelectronics for wireless telecommunications, UWB and GNSS systems. He is Head of the Electronics and Signal Processing Laboratory ESPLAB of the EPFL IMT-NE. His laboratory works also for video and audio compression algorithms and their implementation in low power integrated circuits.
Philippe RenaudPhilippe Renaud is Professor at the Microsystem Laboratory (LMIS4) at EPFL. He is also the scientific director of the EPFL Center of MicroNanoTechnology (CMI). His main research area is related to micronano technologies in biomedical applications (BioMEMS) with emphasis on cell-chips, nanofluidics and bioelectronics. Ph. Renaud is invloved in many scientifics papers in his research area. He received his diploma in physics from the University of Neuchâtel (1983) and his Ph.D. degree from the University of Lausanne (1988). He was postdoctoral fellow at University of California, Berkeley (1988-89) and then at the IBM Zürich Research Laboratory in Switzerland (1990-91). In 1992, he joined the Sensors and Actuators group of the Swiss Center for Electronics and Microtechnology (CSEM) at Neuchâtel, Switzerland. He was appointed assistant professor at EPFL in 1994 and full professor in 1997. In summer 1996, he was visiting professor at the Tohoku University, Japan. Ph. Renaud is active in several scientific committee (scientific journals, international conferences, scientific advisory boards of companies, PhD thesis committee). He is also co-founder of the Nanotech-Montreux conference. Ph. Renaud is committed to valorization of basic research through his involvement in several high-tech start-up companies.
John Richard ThomeJohn R. Thome is Professor of Heat and Mass Transfer at the Swiss Federal Institute of Technology in Lausanne (EPFL), Switzerland since 1998, where his primary interests of research are two-phase flow and heat transfer, covering both macro-scale and micro-scale heat transfer and enhanced heat transfer. He directs the Laboratory of Heat and Mass Transfer (LTCM) at the EPFL with a research staff of about 18-20 and is also Director of the Doctoral School in Energy. He received his Ph.D. at Oxford University, England in 1978. He is the author of four books: Enhanced Boiling Heat Transfer (1990), Convective Boiling and Condensation, 3rd Edition (1994), Wolverine Engineering Databook III (2004) and Nucleate Boiling on Micro-Structured Surfaces (2008). He received the ASME Heat Transfer Division's Best Paper Award in 1998 for a 3-part paper on two-phase flow and flow boiling heat transfer published in the Journal of Heat Transfer. He has received the J&E Hall Gold Medal from the U.K. Institute of Refrigeration in February, 2008 for his extensive research contributions on refrigeration heat transfer and more recently the 2010 ASME Heat Transfer Memorial Award. He has published widely on the fundamental aspects of microscale and macroscale two-phase flow and heat transfer and on enhanced boiling and condensation heat transfer.
Andreas Peter BurgAndreas Burg was born in Munich, Germany, in 1975. He received his Dipl.-Ing. degree in 2000 from the Swiss Federal Institute of Technology (ETH) Zurich, Zurich, Switzerland. He then joined the Integrated Systems Laboratory of ETH Zurich, from where he graduated with the Dr. sc. techn. degree in 2006.
In 1998, he worked at Siemens Semiconductors, San Jose, CA. During his doctoral studies, he was an intern with Bell Labs Wireless Research for a total of one year. From 2006 to 2007, he held positions as postdoctoral researcher at the Integrated Systems Laboratory and at the Communication Theory Group of the ETH Zurich. In 2007 he co-founded Celestrius, an ETH-spinoff in the field of MIMO wireless communication, where he was responsible for the ASIC development as Director for VLSI. In January 2009, he joined ETH Zurich as SNF Assistant Professor and as head of the Signal Processing Circuits and Systems group at the Integrated Systems Laboratory.
In January 2011, he became a Tenure Track Assistant Professor at the Ecole Polytechnique Federale de Lausanne (EPFL) where he is leading the Telecommunications Circuits Laboratory in the School of Engineering. In June 2018 he was promoted to the role of a Tenured Associate Professor.
In 2000, Mr. Burg received the Willi Studer Award and the ETH Medal for his diploma and his diploma thesis, respectively. Mr. Burg was also awarded an ETH Medal for his Ph.D. dissertation in 2006. In 2008, he received a 4-years grant from the Swiss National Science Foundation (SNF) for an SNF Assistant Professorship. In his professional career, Mr. Burg was involved in the development of more than 25 ASICs. He is a member of the IEEE and of the European Association for Signal Processing (EURASIP).
Research interests and expertise
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Circuits and systems for telecommunications (wireless and wired)
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Prototyping and silicon implementation of new communication technologies
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Development of communication algorithms and optimization for hardware implementation
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Low-power VLSI signal processing for communications and other applications
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Digital integrated circuits
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Circuits for image and video processing
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
Yves BellouardDr. Yves Bellouard is Associate Professor in Microengineering at Ecole Polytechnique Fédérale de Lausanne (EPFL) in Switzerland, where he heads the Galatea lab and the Richemont Chair in micromanufacturing. He received a BS in Theoretical Physics and a MS in Applied Physics from Université Pierre et Marie Curie in Paris, France in 1994-1995 and a PhD in Microengineering from Ecole Polytechnique Fédérale de Lausanne (EPFL) in Lausanne, Switzerland in 2000. For his PhD work, he received the Omega Scientific prize (2001) for outstanding contribution in the field of microengineering for his work on Shape Memory Alloys. Before joining EPFL in 2015, he was Associate Professor at Eindhoven University of Technologies (TU/e) in the Netherlands and prior to that, Research Scientist at Rensselaer Polytechnic Institute (RPI) in Troy, New York for about four years where he started working on femtosecond laser processing of glass materials. From 2010 until 2013, Yves Bellouard initiated and coordinated the Femtoprint project, a European research initiative aiming at investigating a table-top printer for microsystems ('3D printing of microsystems'). In 2013, he received a prestigious ERC Starting Grant (Consolidator-2012) from the European Research Council and a JSPS Fellowship from the Japan Society for the Promotion of Science. His current research interests are on new paradigms for system integration at the microscale and in particular laser-based methods to tailor material properties for achieving higher level of integration in microsystems, like for instance integrating optics, mechanics and fluidics in a single monolith. These approaches open new opportunities for direct-write methods of microsystems (3D printing). Personal website
