Concept

Memory paging

Publications associées (279)

Enabling efficient OS paging for main-memory OLTP databases

Even though main memory is becoming large enough to fit most OLTP databases, it may not always be the best option. OLTP workloads typically exhibit skewed access patterns where some records are hot (frequently accessed) but many records are cold (infrequen ...

2013

LLR Compression for BICM Systems Using Large Constellations

Bixio Rimoldi, Stefano Rosati

Digital video broadcasting (DVB-C2) and other modern communication standards increase diversity by means of a symbol-level interleaver that spans over several codewords. Deinterleaving at the receiver requires a large memory, which has a significant impact ...

Institute of Electrical and Electronics Engineers2013

X-Stream: Edge-centric Graph Processing using Streaming Partitions

Willy Zwaenepoel, Amitabha Roy, Ivo Mihailovic

X-Stream is a system for processing both in-memory and out-of-core graphs on a single shared-memory machine. While retaining the scatter-gather programming model with state stored in the vertices, X-Stream is novel in (i) using an edge-centric rather than ...

ACM2013

TOUCH: In-Memory Spatial Join by Hierarchical Data-Oriented Partitioning

Anastasia Ailamaki, Thomas Heinis, Farhan Tauheed, Sadegh Heyrani Nobari

Efficient spatial joins are pivotal for many applications and particularly important for geographical information systems or for the simulation sciences where scientists work with spatial models. Past research has primarily focused on disk-based spatial jo ...

2013

Runtime 3-D Stacked Cache Management for Chip-Multiprocessors

Giovanni De Micheli

These-dimensional (3-D) memory stacking is one of the most promising solutions to memory bandwidth problems in chip multiprocessors. In this work, we propose an efficient runtime 3-D cache management technique which takes advantage of the lower latencies t ...

2013

Using Managed Runtime Systems to Tolerate Holes in Wearable Memories

James Richard Larus

New memory technologies, such as phase-change memory (PCM), promise denser and cheaper main memory, and are expected to displace DRAM. However, many of them experience permanent failures far more quickly than DRAM. DRAM mechanisms that handle permanent fai ...

ACM2013

Towards Multi-Fabric 3D Integration Architectures

Panagiotis Athanasopoulos

The main aim of this thesis is to examine the advantages of 3D stacking applied to microprocessors and related integrated microprocessor systems in the architectural level. In the succession of years microprocessors are aiming towards lower power consumpti ...

EPFL2012

Concurrent Tries with Efficient Non-Blocking Snapshots

Martin Odersky, Aleksandar Prokopec

We describe a non-blocking concurrent hash trie based on shared-memory single-word compare-and-swap instructions. The hash trie supports standard mutable lock-free operations such as insertion, removal, lookup and their conditional variants. To ensure spac ...

Assoc Computing Machinery2012

On the cost of composing shared-memory algorithms

Rachid Guerraoui, Dan Alistarh, Giuliano Losa

Decades of research in distributed computing have led to a variety of perspectives on what it means for a concurrent algorithm to be efficient, depending on model assumptions, progress guarantees, and complexity metrics. It is therefore natural to ask whet ...

ACM Press2012

3D-LIN: A Configurable Low-Latency Interconnect for Multi-Core Clusters with 3D Stacked L1 Memory

Giovanni De Micheli, Yusuf Leblebici, Luca Benini, Giulia Beanato

Shared L1 memories are of interest for tightly- coupled processor clusters in programmable accelerators as they provide a convenient shared memory abstraction while avoiding cache coherence overheads. The performance of a shared-L1 memory critically depend ...

2012

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