Concept
The ARM Cortex-R is a family of 32-bit and 64-bit RISC ARM processor cores licensed by Arm Ltd. The cores are optimized for hard real-time and safety-critical applications. Cores in this family implement the ARM Real-time (R) profile, which is one of three architecture profiles, the other two being the Application (A) profile implemented by the Cortex-A family and the microcontroller (M) profile implemented by the Cortex-M family. The ARM Cortex-R family of microprocessors currently consists of ARM Cortex-R4(F), ARM Cortex-R5(F), ARM Cortex-R7(F), ARM Cortex-R8(F), ARM Cortex-R52(F), and ARM Cortex-R82(F). ARM architecture and List of ARM cores The ARM Cortex-R is a family of ARM cores implementing the R profile of the ARM architecture; that profile is designed for high performance hard real-time and safety critical applications. It is similar to the A profile for applications processing but adds features which make it more fault tolerant and suitable for use in hard real-time and safety critical applications. Real time and safety critical features added include: Tightly coupled memory (uncached memory with guaranteed fast access time) Increased exception handling in hardware Hardware division instructions Memory protection unit (MPU) Deterministic interrupt handling as well as fast non-maskable interrupts ECC on L1 cache and buses Dual-core lockstep for CPU fault tolerance The Armv8-R architecture includes virtualization features similar to those introduced in the Armv7-A architecture. Two stages of MPU-based translation are provided to enable multiple operating systems to be isolated from one another under the control of a hypervisor. Prior to the R82, introduced on 4 September 2020, the Cortex-R family did not have a memory management unit (MMU). Models prior to the R82 could not use virtual memory, which made them unsuitable for many applications, such as full-featured Linux. However, many real-time operating systems (RTOS), with an emphasis on total control, have traditionally regarded the lack of an MMU as a feature, not a bug.
