Mathias Josef PayerMathias Payer is a security researcher and professor at the EPFL school of computer and communication sciences (IC), leading the HexHive group. His research focuses on protecting applications in the presence of vulnerabilities, with a focus on memory corruption and type violations. He is interested in software security, system security, binary exploitation, effective mitigations, fault isolation/privilege separation, strong sanitization, and software testing (fuzzing) using a combination of binary analysis and compiler-based techniques. More details are available in his CV.
Mirjana StojilovicMirjana Stojilović received the Dipl. Ing. and Ph.D. degrees from the School of Electrical Engineering, University of Belgrade, in 2006 and 2013, respectively. From 2010 to 2013, she was collaborating with the Processor Architecture Laboratory at EPFL, visiting periodically as a Guest Researcher. From 2013 to 2016, she was working at the University of Applied Sciences Western Switzerland as a senior researcher, and at EPFL as a lecturer. She joined Parallel Systems Architecture Lab at EPFL in October 2016. Mirjana's main research interests include electronic design automation, reconfigurable computing, electromagnetic-compatibility and signal-integrity issues, and hardware security. Mirjana Stojilović serves on the program committee of the FPGA, FPL, and FCCM conferences and as a reviewer for IEEE TCAD, TVLSI, TC, TEMC, IEEE Access and ACM TRETS. She received the Best Paper Award at 2016 International Symposium on Electromagnetic Compatibility (EMC Europe 2016), Young Scientist Award at 33rd International Conference on Lightning Protection (ICLP2016), and the Young Author Best Paper Award at the 20th Telecommunication Forum in Belgrade (TELFOR 2012). In 2015, the EPFL School of Computer and Communication Sciences (IC) presented her with the Teaching Award.
Ties Jan Henderikus KluterSince January 2011:
Teaching digital systems at the Swiss Federal Institute of Technology, Lausanne Switzerland
Since August 2009:
Teaching responsible for digital systems at the university of applied science of Bern, Bienne Switzerland
2003-2010:
Ph.D. candidate at the Swiss Federal Institute of Technology, Lausanne Switzerland
2002-2003:
Product development team leader in the infotainment group of Agere Systems, Nieuwegein The Netherlands.
1997-2003:
Design Engineer in the design services group of Dedris Embedded Algorithms/Frontier Design BV./Adelante Technologies, Tiel The Netherlands
1996-1997:
Assistant R&D at the faculty of computer controlled systems and computer techniques University of Twente, Enschede The Netherlands
1992-1996:
MSc. education at the Technical University of Twente, Enschede The Netherlands
1988-1992:
Bc. edudation at the Higher Technical School of Groningen, Groningen The Netherlands
