Concept

Interférence inter-symbole

Publications associées (82)

LoRa Symbol Error Rate Under Non-Aligned Interference

Andreas Peter Burg, Alexios Konstantinos Balatsoukas Stimming, Orion Afisiadis, Matthieu Cotting

In this work, we examine the performance of the LoRa chirp spread spectrum modulation in the presence of both additive white Gaussian noise and interference from another LoRa user. To this end, we extend an existing interference model to the more realistic ...

IEEE2019

Multi-Tone Signaling and ADC-Based Digital Receiver for High-Speed Wireline Serial Links

Gain Kim

The exponential growth of Internet traffic and related demands for higher communication speed pushes processor-to-processor and processor-to-memory interconnects to provide further higher data-rate. Often time, processor-to-memory interconnectsâ speed is ...

EPFL2018

Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver

Cosimo Aprile, Yusuf Leblebici, Alessandro Cevrero, Lukas Kull, Gain Kim, Ilter Ozkaya, Thomas Toifl

This paper presents a parallel implementation technique of digital equalizer for high-speed wireline serial link receiver (RX). In wireline RX, inter-symbol interference (ISI) is mitigated by continuous-time linear equalizer, and the remaining ISI is cance ...

2018

High-Speed Wireline Link Design

Hazar Yüksel

High-speed serial links are a crucial application of semiconductor technology and have been the enabler of the scaling of computing systems. The increasing data-rate requirements of these links have only been partially satisfied by advancements in process ...

EPFL2017

Design and Modeling of Serial Data Transceiver Architecture by Employing Multi-Tone Single-Sideband Signaling Scheme

Yusuf Leblebici, Gain Kim, Kiarash Gharibdoust, Chen Cao, Thierry Barailler

This paper presents the design and analysis of a serial link transceiver (TRX) architecture employing analog multi-tone (AMT) signaling for chip-to-chip communication. Multi-tone single-sideband (SSB) signaling scheme is proposed in TRX architecture in ord ...

Ieee-Inst Electrical Electronics Engineers Inc2017

A Time-Division Multiplexing Signaling Scheme for Inter-Symbol/Channel Interference Reduction in Low-Power Multi-Drop Memory Links

Seyed Armin Tajalli, Yusuf Leblebici, Gain Kim, Kiarash Gharibdoust, Chen Cao

A time-division multiplexing (TDM) digital channel coding scheme with inter-symbol interference (ICI) reduction property for multi-drop memory interfaces has been proposed. Shaping the TX spectrum to avoid channel frequency notches, the proposed digital TD ...

Ieee-Inst Electrical Electronics Engineers Inc2017

Efficient Adaptive Hard Real-time Multi-processor Systems

Stefanos Skalistis

Modern computing systems are based on multi-processor systems, i.e. multiple cores on the same chip. Hard real-time systems are required to perform particular tasks within certain amount of time; failure to do so characterises an unaccepted behavior. Hard ...

EPFL2017

Dependence of a microresonator Kerr frequency comb on the pump linewidth

Tobias Kippenberg, Maxim Karpov, Martin Hubert Peter Pfeiffer, Arne Kordts, Lin Zhang, Amirhossein Mohajerin Ariaei

We experimentally investigate the dependence of Kerr comb generation, comb linewidth, and coherent system performance on the pump linewidth in a microresonator. We find that the generation of the primary comb can have a larger tolerance to the pump linewid ...

Optical Society of America2017

ISI Tolerant Signaling: A Comparative Study of PAM4 and ENRZ

Mohammad Amin Shokrollahi, Ali Hormati

A thorough analysis has been carried out to study and compare the sensitivity of two signaling methods (PAM4 and ENRZ) to inter-symbol interference (ISI). While both signaling methods are considered to be major candidates for implementing 56+ Gbps serial c ...

2016

Architectural Modeling of a Multi-Tone/Single-Sideband Serial Link Transceiver for Lossy Wireline Data Links

Yusuf Leblebici, Gain Kim

This paper presents a serial link transceiver (TRX) architecture that enables high-speed data transmission over a lossy backplane channel without the presence of equalization circuits. The proposed architecture employs multi-tone signaling to reduce inter- ...

Ieee2016

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