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Clock timing jitter refers to random perturbations in the sampling time in analog-to-digital converters (ADCs). The perturbations are caused by circuit imperfections in the sampling clock. This paper analyzes the effect of sampling clock jitter on the acqu ...
We consider a transmission of a delay-sensitive data stream (e. g., a video call) from a single source to a single destination. The reliability of this transmission may suffer from bursty packet losses - the predominant type of failures in today's Internet ...
Several applications are pushing the development of high performance mode-locked lasers: generation of short pulses for extremely high bit rate transmission at 100 Gb/s and beyond, all-optical clock recovery at 40 Gb/s and beyond, generation of millimeter ...
We consider a transmission of a delay-sensitive data stream from a single source to a single destination. The reliability of this transmission may suffer from bursty packet losses - the predominant type of failures in today's Internet. An effective and wel ...
In a non-ideal PLL circuit, leakage of the reference signal into the control line produces spurious tones. When the distorted PLL signal is used in an analog-to-digital converter (ADC), it creates spurious tones in the sampled data as well. In spectrum sen ...
Clock timing jitters refer to random perturbations in the sampling time in analog-to-digital converters (ADCs). The perturbations are caused by circuit imperfections in the sampling clock. This paper analyzes the effect of sampling clock jitter on the acqu ...
In this paper, the bit error rate (BER) performance for an ultra-wide bandwidth (UWB) impulse radio in an additive white Gaussian noise (AWGN) transmission channel and with Gaussian jitter is estimated. The assumed receiver combines the received pulses to ...
This article describes some techniques for implementing low- power clock and data recovery (CDR) circuits based on gated- oscillator (GO) topology for short distance applications. Here, the main tradeoffs in design of a high performance and power-efficient ...
This paper studies the specifications of gated-oscillator-based clock and data recovery circuits (GO CDRs) designed for short haul optical data communication systems. Jitter tolerance (JTOL) and frequency tolerance (FTOL) are analyzed and modeled as two ma ...
In recent years, there has been rapid progress on understanding Gaussian networks with multiple unicast connections, and new coding techniques have emerged. The essence of multi-source networks is how to efficiently manage interference that arises from the ...
