Concept

VHDL

Publications associées (71)

Highly Parallel RTL Simulation

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL.As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and s ...

EPFL2024

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Sahand Kashani

The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators.Specialized hardware has already redefined ...

EPFL2023

Uncooperative Rendezvous in Space: Design of an Electronic Architecture for High Performance Avionic with Multi Sensor Input and Intensive Data Rate.

Michaël Yannick Juillard

Active Debris Removal missions consist of sending a satellite in space and removing one or more debris from their current orbit. A key challenge is to obtain information about the uncooperative target. By gathering the velocity, position, and rotation of t ...

EPFL2022

Analytic modelling of passive microfluidic mixers

Jean-Michel Sallese, Christophe Lallement

This paper deals with a new analytical model for microfluidic passive mixers. Two common approaches already exist for such a purpose. On the one hand, the resolution of the advection-diffusion-reaction equation (ADRE) is the first one and the closest to ph ...

AMER INST MATHEMATICAL SCIENCES-AIMS2022

MALTA3: Concepts for a new radiation tolerant sensor in the TowerJazz 180 nm technology

Francesco Piro

The upgrade of the MALTA DMAPS designed in Tower 180 nm CMOS Imaging process will implement the numerous modifications, as well as front-end changes in order to boost the charge collection efficiency after the targeted fluence of 1x10(15) 1 MeVn(eq)/cm(2). ...

ELSEVIER2022

High-Level Synthesis of Dynamically Scheduled Circuits

Lana Josipovic

High-Level Synthesis (HLS) tools generate hardware designs from high-level programming languages. These tools almost universally build datapaths that are controlled using a centralized controller which relies on a static, compile-time schedule to determine ...

EPFL2021

Equal Loss Distribution in Duty-Cycle Controlled H-Bridge LLC Resonant Converters

Drazen Dujic, Jakub Kucka

The duty-cycle control is a popular option for current limiting in LLC resonant converters. Such current limiting is required to protect the converter either during the start-up or during an overload. Although this method proved to be effective, the switch ...

2020

Design and experimental validation of an FPGA-based PMU simultaneously compliant with P and M performance classes

Mario Paolone, Asja Derviskadic

Low-inertia grids are characterized by high shares of harmonic and inter-harmonic distortion, produced by the inverters that interface non-conventional generation assets to the electrical grid. These interfering tones largely compromise synchrophasor estim ...

2020

A Too to Design Interactive Characters Based on Embodied Cognition

Ronan Boulic, Joan Llobera Mahy

Creating interactive characters is one of the most challenging tasks of videogame design. In order to facilitate such an endeavor, we introduce a decisional and behavior synthesis architecture integrated in the game engine Unity3D. A distinguishing feature ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

High density fiber postitioner system for massive spectroscopic surveys

Hannes Bleuler, Jean-Paul Richard Kneib, Mohamed Bouri, Luzius Gregor Kronig, Philipp Hörler

We describe here a novel design of a fast high-density robotized fiber positioner system for massive spectroscopic surveys. The fiber positioners are compact, robust, and they can be coordinated, allowing for a high spatial density. Furthermore, the high a ...

OXFORD UNIV PRESS2018

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