Concept

Uniform memory access

Publications associées (97)

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Passing Messages while Sharing Memory

Rachid Guerraoui, Naama Ben David

We introduce a new distributed computing model called m&m that allows processes to both pass messages and share memory. Motivated by recent hardware trends, we find that this model improves the power of the pure message-passing and shared-memory models. As ...

ASSOC COMPUTING MACHINERY2018

Optimized Memory Access For Dynamically Scheduled High Level Synthesis

Paolo Ienne, Atri Bhattacharyya

Dynamically-scheduled elastic circuits generated by High-Level Synthesis (HLS) tools are inherently out-of-order, following the flow of data rather than the evolution of an instruction pointer. Components of the circuit which access memory need to be conne ...

2018

A GPU-Friendly Skiplist Algorithm

Nachshon Cohen

We propose a design for a fine-grained lock-based skiplist optimized for Graphics Processing Units (GPUs). While GPUs are often used to accelerate streaming parallel computations, it remains a significant challenge to efficiently offload concurrent computa ...

Ieee2017

An Accelerator for High Efficient Vision Processing

Paolo Ienne, Robert Fasthuber, Zidong Du, Qi Guo

In recent years, neural network accelerators have been shown to achieve both high energy efficiency and high performance for a broad application scope within the important category of recognition and mining applications. Still, both the energy efficiency a ...

Ieee-Inst Electrical Electronics Engineers Inc2017

An Out-of-Order Load-Store Queue for Spatial Computing

Paolo Ienne, Lana Josipovic, Philip Brisk

The efficiency of spatial computing depends on the ability to achieve maximal parallelism. This necessitates memory interfaces that can correctly handle memory accesses that arrive in arbitrary order while still respecting data dependencies and ensuring ap ...

Assoc Computing Machinery2017

Multi-Library Coded Caching

Michael Christoph Gastpar, Saeid Sahraei

We study the problem of coded caching when the server has access to several libraries and each user makes independent requests from every library. The single-library scenario has been well studied and it has been proved that coded caching can significantly ...

2016

Scaling Up Concurrent Analytical Workloads on Multi-Core Servers

Iraklis Psaroudakis

Today, an ever-increasing number of researchers, businesses, and data scientists collect and analyze massive amounts of data in database systems. The database system needs to process the resulting highly concurrent analytical workloads by exploiting modern ...

EPFL2016

Scale-out non-uniform memory access

Babak Falsafi, Edouard Bugnion, Boris Robert Grot, Alexandros Daglis, Stanko Novakovic

A computing system that uses a Scale-Out NUMA (“soNUMA”) architecture, programming model, and/or communication protocol provides for low-latency, distributed in-memory processing. Using soNUMA, a programming model is layered directly on top of a NUMA memor ...

2015

Convolution Engine: Balancing Efficiency and Flexibility in Specialized Computing

Christos Kozyrakis

General-purpose processors, while tremendously versatile, pay a huge cost for their flexibility by wasting over 99% of the energy in programmability overheads. We observe that reducing this waste requires tuning data storage and compute structures and thei ...

2015

Efficient Communication and Synchronization on Manycore Processors

Darko Petrovic

The increased number of cores integrated on a chip has brought about a number of challenges. Concerns about the scalability of cache coherence protocols have urged both researchers and practitioners to explore alternative programming models, where cache co ...

EPFL2015