BIOS (informatique) | EPFL Graph Search

Le BIOS, de l'Basic Input Output System (en français : « système élémentaire d'entrée/sortie ») est le nom donné sur les ordinateurs issu de la norme de comparabilité IBM PC, à ce que l'on appelle plus généralement un firmware (traduit en micrologiciel). Il est donc principalement utilisé sur les systèmes informatiques utilisant l'architecture de processeur i686 d'Intel et x86_64 d'AMD. Il comporte un ensemble de fonctions, contenu dans la mémoire morte (ROM) de la carte mère de ces ordinateurs, lui permettant d'effectuer des opérations de base, lors de sa mise sous tension. Par exemple l'identification et l'initialisation des périphériques d'alimentation et d’entrée/sortie connectés et la lecture du système d'amorçage, que ce soit un secteur d'amorçage sur la mémoire de masse (disquette, disque dur, CD, clé USB, microSD, disque SSD), ou bien une adresse fournie par le réseau. Il permet également au système de communiquer avec les différents périphériques de la c

VHDL-AMS Model of an Electrochemical Cell to Design VLSI Bio-Chips

Marialaura Beltrandi, Sandro Carrara, Giovanni De Micheli, Yusuf Leblebici, Alain Vachoux

This paper presents a new VHDL-AMS behavioral model of an electrochemical cell suitable for the design of VLSI bio-chips. Existing models are mainly equivalent circuit macromodels using electrical primitives, which hardly fit the actual behavior of biosensors. The presented VHDL-AMS model expresses a more realistic behavior as it can directly use electrochemical equations. It can also be made very flexible and reusable for different experimentation cases. Last, but not least, it can be easily used for the design of bio-chips.

2011

Hardware/Software Co-Design and Reliability Analysis of Ultra-Low Power Biomedical Devices

Soumya Subhra Basu

Smart health monitoring devices, known as Wireless Body Sensor Nodes (WBSN) are transforming today's health-care landscape, shifting it from traditional hospital-based methods toward more personalized approaches. Their demand is ever-increasing in the modern world, where an overwhelming majority of deaths are caused by chronic cardiovascular diseases. WBSNs provide low-cost, unobtrusive and wearable solutions for continuous health-monitoring. These small autonomous devices are capable of acquiring, processing and wirelessly transmitting biological signals to medical personnel, typically relying on a limited on-board power source. Since WBSNs are desired to operate over prolonged periods, producing potentially critical data, their reliability and energy efficiency are of paramount importance. State-of-the-Art (SoA) WBSNs are able to process on-board the sensed bio-signals, like Electrocardiograms (ECG), transmitting only compact sets of clinically-relevant features instead of the entire acquired signal. This scenario moves the energy bottleneck of such devices from the transmission link to the computation-intensive Bio-Signal Processing (BSP) segment. To improve their energy efficiency, in this thesis, I propose strategies ranging from architectural to technology levels. First, I explore the applicability of a relaxed-reliability computing paradigm resulting from ultra-low voltage operations. I begin by modeling memory failures ensuing from voltage over-scaling and fabrication variability-related issues, studying their effects at the application level. To this end, I introduce novel data significance-based protection approaches for countering failures in embedded memories, showcasing up to 20% reduction in the energy budget compared to existing solutions. In addition, I devise lightweight hardware- and software-level error monitoring solutions that cope with memory failures, when unprotected. Experimental results demonstrate that these strategies ensure minimal performance degradation, achieving up to 24% energy savings with respect to the SoA. In the second part of the thesis, I employ novel approaches featuring heterogeneous WBSNs with a reconfigurable accelerator and emerging memory technologies. I commence by performing a study to identify the computationally intensive segments of BSP algorithms that can potentially be accelerated on a reconfigurable fabric. I adopt a top-down approach to do so, extracting kernels from the high-level application code, eventually optimizing and mapping them for execution on a time- and resource-shared Coarse Grain Reconfigurable Array (CGRA). I prove the effectiveness of the proposed platform by exhibiting up to 11x performance improvement and 37% energy savings over the SoA. Then, I combine relaxed-reliability computation and CGRA-based WBSNs, with my experiments exhibiting as much as 70% reduction in energy consumption compared to the current SoA, while assuring safe system operation. I conclude this work by exploring the integration of emerging Resistive Random Access Memory (ReRAM) technologies to traditional WBSN platforms, aimed at reducing their ever-increasing leakage energy consumption. In this regard, I report the memory-level endurance challenges faced due to aging and propose lightweight solutions for prolonged device usage. Obtained results highlight up to 65% increase in energy efficiency with respect to the SoA, including the overheads required for extended device functionality.

EPFL2019

A Quality-Scalable and Energy-Efficient Approach for Spectral Analysis of Heart Rate Variability

Mohamed Mostafa Sabry Aly, David Atienza Alonso, Andreas Peter Burg, Georgios Karakonstantis, Aviinaash Sankaranarayanan

Today there is a growing interest in the integration of health monitoring applications in portable devices necessitating the development of methods that improve the energy efficiency of such systems. In this paper, we present a systematic approach that enables energy-quality trade-offs in spectral analysis systems for bio-signals, which are useful in monitoring various health conditions as those associated with the heart-rate. To enable such trade-offs, the processed signals are expressed initially in a basis in which significant components that carry most of the relevant information can be easily distinguished from the parts that influence the output to a lesser extent. Such a classification allows the pruning of operations associated with the less significant signal components leading to power savings with minor quality loss since only less useful parts are pruned under the given requirements. To exploit the attributes of the modified spectral analysis system, thresholding rules are determined and adopted at design- and run-time, allowing the static or dynamic pruning of less-useful operations based on the accuracy and energy requirements. The proposed algorithm is implemented on a typical sensor node simulator and results show up-to 82% energy savings when static pruning is combined with voltage and frequency scaling, compared to the conventional algorithm in which such trade-offs were not available. In addition, experiments with numerous cardiac samples of various patients show that such energy savings come with a 4.9% average accuracy loss, which does not affect the system detection capability of sinus-arrhythmia which was used as a test case.

IEEE2014

Hardware/Software Co-Design and Reliability Analysis of Ultra-Low Power Biomedical Devices

Soumya Subhra Basu

EPFL2019