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Mémoire flash

Publications associées (379)

3D-LIN: A Configurable Low-Latency Interconnect for Multi-Core Clusters with 3D Stacked L1 Memory

Giovanni De Micheli, Yusuf Leblebici, Luca Benini, Giulia Beanato

Shared L1 memories are of interest for tightly- coupled processor clusters in programmable accelerators as they provide a convenient shared memory abstraction while avoiding cache coherence overheads. The performance of a shared-L1 memory critically depend ...

2012

Software Controlled Cell Bit-Density to Improve NAND Flash Lifetime

Paolo Ienne, David Novo Bruna, Xavier Jimenez

Hybrid flash architectures combine static partitions in Sing le Level Cell (SLC) mode with partitions in Multi Level Cell (MLC) mode. Compared to MLC-only solutions, the former exploits fast and short random writes while the latter brings large capacity. O ...

Ieee2012

A 500 fW/bit 14 fJ/bit-access 4kb Standard-Cell Based Sub-VT Memory in 65nm CMOS

Andreas Peter Burg, Pascal Andreas Meinerzhagen, Oskar Andersson

Ultra-low power (ULP) biomedical implants and sensor nodes typically require small memories of a few kb, while previous work on reliable subthreshold (sub-Vt) memories targets several hundreds of kb. Standard-cell based memories (SCMs) are a straightforwar ...

2012

Standard-Cell Based Memories (SCMs): from Sub-VT to Error-Resilient Systems

Andreas Peter Burg, Pascal Andreas Meinerzhagen

Embedded memories consume an increasingly dominant part of the overall area and power of a large variety of systems-on-chip [ITRS’09]: 1) biomedical implants and wireless sensor networks require robust memories operating in the sub-VT domain; 2) many handh ...

2012

Resolution of Nested Neuronal Representations Can Be Exponential in the Number of Neurons

Alexander Mathis

Collective computation is typically polynomial in the number of computational elements, such as transistors or neurons, whether one considers the storage capacity of a memory device or the number of floating-point operations per second of a CPU. However, w ...

2012

Low-cost, CMOS compatible, Ta2O5-based hemi-memristor for neuromorphic circuits

Giovanni De Micheli, Sandro Carrara

In the past, tantalum oxide devices have been used to create non-volatile digital memories, whilst neglecting the analogue memristive characteristics of such devices. In this Letter, it is shown that these devices can provide a low-cost, low-power solution ...

Institution of Engineering and Technology2012

A High-throughput and Low-Latency Interconnection Network for Multi-Core Clusters with 3-D Stacked L2 Tightly-Coupled Data Memory

Giovanni De Micheli, Luca Benini

The performance of most digital systems today is limited by the interconnect latency between logic and memory, rather than by the performance of logic or memory itself. Three- dimensional (3-D) integration using through-silicon-vias (TSVs) may provide a so ...

2012

Path Processing using Solid State Storage

Manoussos Gavriil Athanassoulis

Recent advances in solid state technology have led to the introduction of Solid State Drives (SSDs). Todays SSDs store data persistently using NAND ﬂash memory. While SSDs are more expensive than hard disks when measured in dollars per gigabyte, they are s ...

2012

A Distributed Interleaving Scheme for Efficient Access to WideIO DRAM Memory

Giovanni De Micheli, Luca Benini, Ciprian Seiculescu

Achieving the main memory (DRAM) required bandwidth at ac- ceptable power levels for current and future applications is a ma- jor challenge for System-on-Chip designers for mobile platforms. Three dimensional (3D) integration and 3D stacked DRAM mem- ories ...

2012

GMS: Generic Memristive Structure for Non-Volatile FPGAs

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Pierre-Emmanuel Julien Marc Gaillardon, Shashi Kanth Bobba

The invention of the memristor enables new possibilities for computation and non-volatile memory storage. In this paper we propose a Generic Memristive Structure (GMS) for 3-D FPGA applications. The GMS cell is demonstrated to be utilized for steering logi ...

2012

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