Mihai Adrian IonescuD'origine et de nationalités roumaine et suisse, Mihai-Adrian Ionescu est né en 1965. Après le doctorat en Physique des Composants à Semiconducteurs de lInstitut National Polytechnique de Grenoble, M. Ionescu a travaillé comme chercheur post-doctoral au LETI-CEA Grenoble, sur la caractérisation des diélectriques low-k pour les technologies submicroniques CMOS. Après une courte période au sein du CNRS, comme chargé de recherche 1ere Classe il a effectué un séjour post-doctoral au Center for Integrated Systems, Stanford University, USA. Actuellement il est Professeur Nanoélectronique à lEcole Polytechnique Fédérale de Lausanne.
Andreas Peter BurgAndreas Burg was born in Munich, Germany, in 1975. He received his Dipl.-Ing. degree in 2000 from the Swiss Federal Institute of Technology (ETH) Zurich, Zurich, Switzerland. He then joined the Integrated Systems Laboratory of ETH Zurich, from where he graduated with the Dr. sc. techn. degree in 2006.
In 1998, he worked at Siemens Semiconductors, San Jose, CA. During his doctoral studies, he was an intern with Bell Labs Wireless Research for a total of one year. From 2006 to 2007, he held positions as postdoctoral researcher at the Integrated Systems Laboratory and at the Communication Theory Group of the ETH Zurich. In 2007 he co-founded Celestrius, an ETH-spinoff in the field of MIMO wireless communication, where he was responsible for the ASIC development as Director for VLSI. In January 2009, he joined ETH Zurich as SNF Assistant Professor and as head of the Signal Processing Circuits and Systems group at the Integrated Systems Laboratory.
In January 2011, he became a Tenure Track Assistant Professor at the Ecole Polytechnique Federale de Lausanne (EPFL) where he is leading the Telecommunications Circuits Laboratory in the School of Engineering. In June 2018 he was promoted to the role of a Tenured Associate Professor.
In 2000, Mr. Burg received the Willi Studer Award and the ETH Medal for his diploma and his diploma thesis, respectively. Mr. Burg was also awarded an ETH Medal for his Ph.D. dissertation in 2006. In 2008, he received a 4-years grant from the Swiss National Science Foundation (SNF) for an SNF Assistant Professorship. In his professional career, Mr. Burg was involved in the development of more than 25 ASICs. He is a member of the IEEE and of the European Association for Signal Processing (EURASIP).
Research interests and expertise
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Circuits and systems for telecommunications (wireless and wired)
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Prototyping and silicon implementation of new communication technologies
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Development of communication algorithms and optimization for hardware implementation
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Low-power VLSI signal processing for communications and other applications
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Digital integrated circuits
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Circuits for image and video processing
Jürgen BruggerI am a Professor of Microengineering and co-affiliated to Materials Science. Before joining EPFL I was at the MESA Research Institute of Nanotechnology at the University of Twente in the Netherlands, at the IBM Zurich Research Laboratory, and at the Hitachi Central Research Laboratory, in Tokyo, Japan. I received a Master in Physical-Electronics and a PhD degree from Neuchâtel University, Switzerland. Research in my laboratory focuses on various aspects of MEMS and Nanotechnology. My group contributes to the field at the fundamental level as well as in technological development, as demonstrated by the start-ups that spun off from the lab. In our research, key competences are in micro/nanofabrication, additive micro-manufacturing, new materials for MEMS, increasingly for wearable and biomedical applications. Together with my students and colleagues we published over 200 peer-refereed papers and I had the pleasure to supervise over 25 PhD students. Former students and postdocs have been successful in receiving awards and starting their own scientific careers. I am honoured for the appointment in 2016 as Fellow of the IEEE “For contributions to micro and nano manufacturing technology”. In 2017 my lab was awarded an ERC AdvG in the field of advanced micro-manufacturing.
Alexandre SchmidAlexandre Schmid received the M.Sc. degree in microengineering and the Ph.D. degree in electrical engineering from the Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland, in 1994 and 2000, respectively. Since 1994, he has been with the EPFL, working with the Integrated Systems Laboratory as a Research and Teaching Assistant, and with the Electronics Laboratories as a Postdoctoral Fellow. In 2002, he was a Senior Research Associate with the Microelectronic Systems Laboratory, where he has been conducting research in the fields of bioelectronic interfaces and implantable biomedical electronics, nonconventional signal processing and neuromorphic hardware, and reliability of nanoelectronic devices, and also teaches with the Microengineering and Electrical Engineering Departments of EPFL. Since 2011, he is a Maître d'Enseignement et de Recherche (MER) Faculty Member with EPFL. He is a coauthor of two books, Reliability of Nanoscale Circuits and Systems, Methodologies and Circuit Architectures, Springer, 2011, and Wireless Cortical Implantable Systems, Springer, 2013, and a coeditor of one book, as well as over 100 articles published in journals and conferences.
Dr. Schmid has served as the General Chair of the Fourth International Conference on Nano-Networks in 2009 and has been serving as an Associate Editor of the Institute of Electrical, Information, and Communication Engineers Electronics Express since 2009.
Nava SetterNava Setter completed MSc in Civil Engineering in the Technion (Israel) and PhD in Solid State Science in Penn. State University (USA) (1980). After post-doctoral work at the Universities of Oxford (UK) and Geneva (Switzerland), she joined an R&D institute in Haifa (Israel) where she became the head of the Electronic Ceramics Lab (1988). She began her affiliation with EPFL in 1989 as the Director of the Ceramics Laboratory, becoming Full Professor of Materials Science and Engineering in 1992. She had been Head of the Materials Department in the past and more recently has served as the Director of the Doctoral School for Materials.
Research at the Ceramics Laboratory, which Nava Setter directs, concerns the science and technology of functional ceramics focusing on piezoelectric and related materials: ferroelectrics, dielectrics, pyroelectrics and also ferromagnetics. The work includes fundamental and applied research and covers the various scales from the atoms to the final devices. Emphasis is given to micro- and nano-fabrication technology with ceramics and coupled theoretical and experimental studies of the functioning of ferroelectrics.
Her own research interests include ferroelectrics and piezoelectrics: in particular the effects of interfaces, finite-size and domain-wall phenomena, as well as structure-property relations and the pursuit of new applications. The leading thread in her work over the years has been the demonstration of how basic or fundamental concepts in materials - particularly ferroelectrics - can be utilized in a new way and/or in new types of devices. She has published over 450 scientific and technical papers.
Nava Setter is a Fellow of the Swiss Academy of Technical Sciences, the Institute of Electrical and Electronic Engineers (IEEE), and the World Academy of Ceramics. Among the awards she received are the Swiss-Korea Research Award, the ISIF outstanding achievement award, and the Ferroelectrics-IEEE recognition award. In 2010 her research was recognized by the European Union by the award of an ERC Advanced Investigator Grant. Recently she received the IEEE-UFFC Achievement Award (2011),the W.R. Buessem Award(2011), the Robert S. Sosman Award Lecture (American Ceramics Society) (2013), and the American Vacuum Society Recognition for Excellence in Leadership (2013).
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
